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  DL205 PLC User Manual Volume 1 of 2 Manual Number: D2-USER-M…
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  Copyright 2012, Automationdirect.com Incorporated All Rights Reserved No part of this manual shall be copied, reproduced, or transmitted in any way without the prior, written consent of Automationdirect.com Incorporated. AutomationDirect retains the exclusive rights to all information included in this document.
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  Nulle partie de ce manuel ne doit être copiée, reproduite ou transmise de quelque façon que ce soit sans le consentement préalable écrit de la société Automationdirect.com Incorporated. AutomationDirect conserve les droits exclusifs à l’égard de tous les renseignements contenus dans le présent document.
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  DL205 PLC USER M NU L Please include the Manual Number and the Manual Issue, both shown below, when communicating with Technical Support regarding this publication. Manual Number: D2-USER-M Issue: 4th Edition, Rev. B Issue Date: 2/13 Publication History Issue Date Description of Changes 1st Edition…

• Page 5: Table Of Contents

  OLUME BLE OF ONTENTS Volume One: Table of Contents ……. .i Volume Two: Table of Contents .

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  Table of Contents Plan for Safety ……….. . .2–2 Three Levels of Protection .
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  Table of Contents Special Placement Considerations for Analog Modules …..2–27 Discrete Input Module Status Indicators ……. .2–27 Color Coding of I/O Modules .
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  Table of Contents D2–12TR, Relay Output ……….2–49 D2–08CDR 4 pt., DC Input / 4pt., Relay Output .
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  Table of Contents Setting the Clock and Calendar ……..3–16 Setting the CPU Network Address .
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  Table of Contents PLC Resources ……….. .3–35 V–Memory .
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  Table of Contents Chapter 4: System Design and Configuration ….4–1 DL205 System Design Strategies ……..4–2 I/O System Configurations .
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  Table of Contents 10BaseFL Network Cabling ……… .4–25 Maximum Cable Length .
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  Table of Contents MWX Slave Memory Address ………4–51 MWX Master Memory Addresses .
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  Table of Contents Timer Example Using Comparative Contacts ……5–43 Accumulating Timer (TMRA) ………5–44 Accumulating Timer Example using Discrete Status Bits .
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  Table of Contents OLUME BLE OF ONTENTS Chapter 6: Drum Instruction Programming (DL250-1/DL260 only) .6–1 Introduction …………6–2 Purpose .
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  Table of Contents Masked Event Drum with Discrete Outputs (MDRMD) …..6–19 Masked Event Drum with Word Output (MDRMW) ……6–21 Chapter 7: RLL PLUS Stage Programming .
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  Table of Contents Unconditional Outputs ……….7–18 Power Flow Transition Technique .
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  Table of Contents Step Bias Proportional to Step Change in SP ……8–12 Eliminating Proportional, Integral or Derivative Action .
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  Table of Contents Loop Mode Override ……….8–53 PV Analog Filter .
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  Table of Contents Standard Maintenance ……….9–2 Air Quality Maintenance .
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  Table of Contents Syntax Check ……….. . .9–18 Duplicate Reference Check .
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  Table of Contents AUX 54 Initialize Scratchpad ……… .A–8 AUX 55 Set Watchdog Timer .
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  Table of Contents Comparative Boolean Instructions ……..C–4 Bit of Word Boolean Instructions .
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  Signed vs. Unsigned Integers ………H–8 AutomationDirect.com Products and Data Types ……H–9…
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  Table of Contents DirectLOGIC PLCs ……….H–9 C-more/C-more Micro-Graphic Panels .
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  H PTER H PTER H PTER ETTING TARTED In This Chapter… Introduction ……… . .1–2 Conventions Used .

• Page 27: Chapter 1: Getting Started

  If you have a comment, question or suggestion about any of our products, services, or manuals, please fill out and return the ‘Suggestions’ card that was included with this manual.

• Page 28: Conventions Used

  Chapter 1: Getting Started Conventions Used When you see the “notepad” icon in the left–hand margin, the paragraph to its immediate right will be a special note. The word NOTE in boldface will mark the beginning of the text. When you see the “exclamation mark” icon in the left–hand margin, the paragraph to its immediate right will be a warning.

• Page 29: Dl205 System Components

  Chapter 1: Getting Started DL205 System Components The DL205 family is a versatile product line that provides a wide variety of features in an extremely compact package. The CPUs are small, but offer many instructions normally only found in larger, more expensive systems. The modular design also offers more flexibility in the fast moving industry of control systems.

• Page 30: Dl205 System Diagrams

  Chapter 1: Getting Started DL205 System Diagrams The diagram below shows the major components and configurations of the DL205 system. The next two pages show specific components for building your system. Simple Motion Control Machine Packaging Elevators Control Conveyors Flexible solutions in one package High-speed counting (up to 100 KHz) Handheld Pulse train output (up to 50KHz…

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  1–6 Chapter 1: Getting Started Direct DL205 Family LOGIC DC INPUT 8pt 12–24 VDC 16pt 24 VDC AC INPUT 32pt 24 VDC 8pt 110 VAC 32pt 5–15 VDC 16pt 110 VAC RELAY OUTPUT AC OUTPUT DC OUTPUT 4pt 5–30 VDC 8pt 18–220 VAC 4pt 12–24 VDC 5–240VAC…

• Page 32: Programming Methods

  Chapter 1: Getting Started Programming Methods There are two programming methods available for the DL205 CPUs, RLL (Relay Ladder Logic) and RLL PLUS (Stage Programming). Both the DirectSOFT5 programming package and the handheld programmer support RLL and Stage. DirectSOFT Programming for Windows. The DL205 can be programmed with one of the most advanced programming packages in the industry ––DirectSOFT5.

• Page 33: Directlogic™ Part Numbering System

  Chapter 1: Getting Started DirectLOGIC™ Part Numbering System As you examine this manual, you will notice there are many different products available. Sometimes it is difficult to remember the specifications for any given product. However, if you take a few minutes to understand the numbering system, it may save you some time and confusion.

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  Chapter 1: Getting Started 1–8 Analog I/O F3– –1 DL05/06 Product family D0/F0 DL205 Product family DL205 Product family D2/F2 D2/F2 DL305 Product family DL305 Product family D3/F3 D3/F3 DL405 Product family D4/F4 Number of channels 02/04/08/16 Alternate example of Analog I/O using abbreviations Input (Analog to Digital) Input (Analog to Digital)

• Page 35: Quick Start For Plc Validation And Programming

  Chapter 1: Getting Started Quick Start for PLC Validation and Programming If you have experience using PLCs, or want to setup a quick example, this section is what you want to use. This example is not intended to explain everything needed to start-up your system.

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  Chapter 1: Getting Started Step 2: Install the CPU and I/O Modules Insert the CPU and I/O into the base. The CPU must be inserted into the first slot of the base (next to the power supply). • Each unit has a plastic retaining clip at the top and bottom.
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  Chapter 1: Getting Started Step 5: Connect the Power Wiring Line Connect the wires as shown. Observe all precautions stated earlier in this manual. For details on wiring see Neutral Chapter 2 Installation, Wiring, and Specifications. Ground When the wiring is complete, replace the CPU and module covers.

• Page 38: Steps To Designing A Successful System

  Chapter 1: Getting Started Steps to Designing a Successful System Step 1: Review the Installation Guidelines Always make safety your first priority in any system application. Chapter 2 provides several guidelines that will help provide a safer, more reliable system. This chapter also includes wiring guidelines for the various system components.

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  Chapter 1: Getting Started Step 6: Review the Programming Concepts The DL205 provides four main approaches to solving the application program, including the PID loop task depicted in the next figure. • RLL diagram style programming is the best tool for solving boolean logic and general CPU register/ accumulator manipulation.
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  H PTER H PTER H PTER NSTALLATION IRING PECIFICATIONS In This Chapter: Safety Guidelines ……..2–2 Mounting Guidelines .

• Page 41: Chapter 2: Installation, Wiring And Specifications

  The protection provided by the equipment may be impaired if this equipment is used in a manner not specified in this manual. A listing of our international affiliates is available on our Web site: http://www.automationdirect.com WARNING: Providing a safe operating environment for personnel and equipment is your responsibility and should be your primary goal during system planning and installation.

• Page 42: Three Levels Of Protection

  Chapter 2: Installation, Wiring and Specifications Three Levels of Protection The publications mentioned provide many ideas and requirements for system safety. At a minimum, you should follow these regulations. Also, you should use the following techniques, which provide three levels of system control. •…

• Page 43: Emergency Power Disconnect

  Chapter 2: Installation, Wiring and Specifications Emergency Power Disconnect A properly rated emergency power disconnect should be used to power the PLC controlled system as a means of removing the power from the entire control system. It may be necessary to install a capacitor across the disconnect to protect against a condition known as “outrush”.

• Page 44: Mounting Guidelines

  Chapter 2: Installation, Wiring and Specifications Mounting Guidelines Before installing the PLC system you will need to know the dimensions of the components considered. The diagrams on the following pages provide the component dimensions to use in defining your enclosure specifications. Remember to leave room for potential expansion. NOTE: If you are using other components in your system, refer to the appropriate manual to determine how those units can affect mounting dimensions.

• Page 45: Panel Mounting And Layout

  Chapter 2: Installation, Wiring and Specifications Panel Mounting and Layout It is important to design your panel properly to help ensure the DL205 products operate within their environmental and electrical limits. The system installation should comply with all appropriate electrical codes and standards. It is important the system also conforms to the operating standards for the application to insure proper performance.

• Page 46: Enclosures

  Automation Powerline Filter, for use with 120 VAC and 240 VAC, 1–5 Amps, is an excellent choice (can be located at www.automationdirect.com), however, you can use a filter of your choice. These units install easily between the power source and the PLC.

• Page 47: Environmental Specifications

  Chapter 2: Installation, Wiring and Specifications Environmental Specifications The following table lists the environmental specifications that generally apply to the DL205 system (CPU, Bases, I/O Modules). The ranges that vary for the Handheld Programmer are noted at the bottom of this chart. I/O module operation may fluctuate depending on the ambient temperature and your application.

• Page 48: Marine Use

  Chapter 2: Installation, Wiring and Specifications Marine Use American Bureau of Shipping (ABS) certification requires flame-retarding insulation as per 4-8-3/5.3.6(a). ABS will accept Navy low smoke cables, cable qualified to NEC “Plenum rated” (fire resistant level 4), or other similar flammability resistant rated cables. Use cable specifications for your system that meet a recognized flame retardant standard (i.e.

• Page 49: Installing Dl205 Bases

  Chapter 2: Installation, Wiring and Specifications Installing DL205 Bases Choosing the Base Type The DL205 system offers four different sizes of bases and three different power supply options. The following diagram shows an example of a 6-slot base. Power Wiring CPU Slot I/O Slots Connections…

• Page 50: Using Mounting Rails

  Chapter 2: Installation, Wiring and Specifications Using Mounting Rails The DL205 bases can also be secured to the cabinet by using mounting rails. You should use rails that conform to DIN EN standard 50 022. Refer to our catalog for a complete line of DIN rail, DINnectors and DIN rail mounted apparatus.

• Page 51: Installing Components In The Base

  Chapter 2: Installation, Wiring and Specifications Installing Components in the Base To insert components into the base: first slide the module retaining clips to the out position and align the PC board(s) of the module with the grooves on the top and bottom of the base. Push the module straight into the base until it is firmly seated in the backplane connector.

• Page 52: Base Wiring Guidelines

  Chapter 2: Installation, Wiring and Specifications Base Wiring Guidelines Base Wiring 110/220 VAC Base T erminal Strip The diagrams show the terminal connections located on the power supply of the DL205 bases. The base terminals 85 – 264 VAC can accept up to 16 AWG. You may be able to use larger wiring depending on the type of wire used, but 16 AWG is the recommended size.

• Page 53: I/O Wiring Strategies

  Chapter 2: Installation, Wiring and Specifications I/O Wiring Strategies The DL205 PLC system is very flexible and will work in many different wiring configurations. By studying this section before actual installation, you can probably find the best wiring strategy for your application. This will help to lower system cost, wiring errors, and avoid safety problems.

• Page 54: Powering I/O Circuits With The Auxiliary Supply

  Chapter 2: Installation, Wiring and Specifications Powering I/O Circuits with the Auxiliary Supply In some cases, using the built-in auxiliary +24VDC supply can result in a cost savings for your control system. It can power combined loads up to 300mA. Be careful not to exceed the current rating of the supply.

• Page 55: Powering I/O Circuits Using Separate Supplies

  Chapter 2: Installation, Wiring and Specifications Powering I/O Circuits Using Separate Supplies In most applications it will be necessary to power the input devices from one power source, and to power output loads from another source. Loads often require high-energy AC power, while input sensors use low-energy DC.

• Page 56: Sinking / Sourcing Concepts

  Chapter 2: Installation, Wiring and Specifications Sinking / Sourcing Concepts Before going further in the study of wiring strategies, you must have a solid understanding of “sinking” and “sourcing” concepts. Use of these terms occurs frequently in input or output circuit discussions.

• Page 57: I/O «Common» Terminal Concepts

  Chapter 2: Installation, Wiring and Specifications I/O “Common” Terminal Concepts Field Main Path In order for a PLC I/O circuit to operate, Device (I/O Point) current must enter at one terminal and exit Circuit at another. Therefore, at least two terminals are associated with every I/O point.

• Page 58: Connecting Dc I/O To «Solid State» Field Devices

  Chapter 2: Installation, Wiring and Specifications Connecting DC I/O to “Solid State” Field Devices In the previous section on Sourcing and Sinking concepts, the DC I/O circuits were explained to sometimes only allow current to flow one way. This is also true for many of the field devices which have solid-state (transistor) interfaces.

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  Chapter 2: Installation, Wiring and Specifications In the next example a PLC sinking DC output point is connected to the sinking input of a field device. This is a little tricky, because both the PLC output and field device input are sinking type.

• Page 60: Relay Output Guidelines

  Chapter 2: Installation, Wiring and Specifications Relay Output Guidelines Several output modules in the DL205 I/O family feature relay outputs: D2–04TRS, D2–08TR, D2–12TR, D2–08CDR, F2–08TR and F2–08TRS. Relays are best for the following applications: • Loads that require higher currents than the solid-state outputs can deliver •…

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  Chapter 2: Installation, Wiring and Specifications Example: Circuit with no Suppression Volts Oscilloscope 24 VDC Relay Coil (24V/125mA/3W, AutomationDirect part no. 750-2C-24D) In the same circuit, replacing the relay with a larger 24V/290mA/7W relay will generate a transient voltage exceeding 800V (not shown). Transient voltages like this can cause many problems, including: •…
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  Chapter 2: Installation, Wiring and Specifications Example: Small Inductive Load with Only Integrated Suppression Oscilloscope Volts * For this example, a 24V/125mA/3W relay is used (AutomationDirect part no. 750-2C-24D) Relay Coil* The next example uses the same circuit as above, but with a larger 24V/290mA/7W relay, thereby creating a larger inductive load.
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  Chapter 2: Installation, Wiring and Specifications Types of Additional Transient Protection DC Coils: The most effective protection against transients from a DC coil is a flyback diode. A flyback diode can reduce the transient to roughly 1V over the supply voltage, as shown in this example. DC Flyback Circuit Volts Oscilloscope…
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  Chapter 2: Installation, Wiring and Specifications Two more common options for DC coils are Metal Oxide Varistors (MOV) or TVS diodes. These devices should be connected across the driver (PLC output) for best protection as shown below. The optimum voltage rating for the suppressor is the lowest rated voltage available that will NOT conduct at the supply voltage, while allowing a safe margin.

• Page 65: I/O Modules Position, Wiring, And Specification

  Chapter 2: Installation, Wiring and Specifications I/O Modules Position, Wiring, and Specification Slot Numbering The DL205 bases each provide different numbers of slots for use with the I/O modules. You may notice the bases refer to 3-slot, 4-slot, etc. One of the slots is dedicated to the CPU, so you always have one less I/O slot.

• Page 66: Special Placement Considerations For Analog Modules

  Chapter 2: Installation, Wiring and Specifications Special Placement Considerations for Analog Modules In most cases, the analog modules can be placed in any slot. However, the placement can also depend on the type of CPU you are using and the other types of modules installed to the left of the analog modules.

• Page 67: Wiring The Different Module Connectors

  Chapter 2: Installation, Wiring and Specifications Wiring the Different Module Connectors There are two types of module connectors for the DL205 I/O. Some modules have normal screw terminal connectors. Other modules have connectors with recessed screws. The recessed screws help minimize the risk of someone accidentally touching active wiring. Both types of connectors can be easily removed.

• Page 68: I/O Wiring Checklist

  Chapter 2: Installation, Wiring and Specifications I/O Wiring Checklist Use the following guidelines when wiring the I/O modules in your system. 1. There is a limit to the size of wire the modules can accept. The table below lists the suggested AWG for each module type.

• Page 69: D2-08Nd3, Dc Input

  Chapter 2: Installation, Wiring and Specifications D2-08ND3, DC Input D2-16ND3-2, DC Input D2-08ND3 DC Input D2-16ND3-2 DC Input Inputs per Module Inputs per Module 8 (sink/source) 16 (sink/source) Commons per Module 2 isolated (8 I/O terminal 1 (2 I/O terminal points) Commons per Module points/com) Input Voltage Range…

• Page 70: D2-32Nd3, Dc Input

  Chapter 2: Installation, Wiring and Specifications D2–32ND3, DC Input D2-32ND3 DC Input Inputs per Module 32 (sink/source) Commons per Module 4 isolated (8 I/O terminal points / com) Input Voltage Range 20-28 VDC Peak Voltage 30 VDC ON Voltage Level 19 VDC minimum OFF Voltage Level 7 VDC maximum…

• Page 71: D2-32Nd3-2, Dc Input

  Chapter 2: Installation, Wiring and Specifications D2–32ND3–2, DC Input D2-32ND3-2 DC Input Inputs per Module 32 (Sink/Source) Commons per Module 4 isolated (8 I/O terminal points / com) Input Voltage Range 4.50 to 15.6 VDC min. to max. Peak Voltage 16 VDC ON Voltage Level 4 VDC minimum…

• Page 72: D2-08Na-1, Ac Input

  Chapter 2: Installation, Wiring and Specifications D2-08NA-1, AC Input D2-08NA-1 AC Input Inputs per Module Commons per Module 1 (2 I/O terminal points) Input Voltage Range 80-132 VAC Peak Voltage 132 VAC ON Voltage Level 75 VAC minimum OFF Voltage Level 20 VAC maximum AC Frequency 47-63 Hz…

• Page 73: D2-08Na-2, Ac Input

  Chapter 2: Installation, Wiring and Specifications D2-08NA-2, AC Input Operating Temperature 32ºF to 131ºF (0º to 55ºC) D2-08NA-2 AC Input Storage Temperature -4ºF to 158ºF (-20ºC to 70ºC) Inputs per Module Humidity 35% to 95% (non-condensing) Commons per Module 1 (2 I/O terminal points) Atmosphere No corrosive gases permitted Input Voltage Range…

• Page 74: D2-16Na, Ac Input

  Chapter 2: Installation, Wiring and Specifications D2-16NA, AC Input F2-08SIM, Input Simulator D2-16NA AC Input F2-08SIM Input Simulator Inputs per Module Inputs per Module Commons per Module Base Power Required 5VDC 2 (isolated) 50 mA Input Voltage Range Terminal Type 80-132 VAC None Peak Voltage…

• Page 75: D2-04Td1, Dc Output

  Chapter 2: Installation, Wiring and Specifications D2-04TD1, DC Output External DC Required D2-04TD1 DC Output 24 VDC @ 20 mA max. Base Power Required 5VDC 60 mA Outputs per Module 4 (current sinking) OFF to ON Response 1 ms Output Points Consumed 8 points (only first 4 pts.

• Page 76: D2-08Td1, Dc Output

  Chapter 2: Installation, Wiring and Specifications D2–08TD1, DC Output D2–08TD2, DC Output D2-08TD1 DC Output D2-08TD2 DC Output Outputs per Module Outputs per Module 8 (current sinking) 8 (current sourcing) Commons per Module Commons per Module 1 (2 I/O terminal points) Output Type Output Type NPN open collector…

• Page 77: D2-16Td1-2, Dc Output

  Chapter 2: Installation, Wiring and Specifications D2–16TD2–2, DC Output D2–16TD1–2, DC Output D2-16TD1-2 DC Output D2-16TD2-2 DC Output Outputs per Module Outputs per Module 16 (current sinking) 16 (current sourcing) Commons per Module Commons per Module 1 (2 I/O terminal points) Output Type Output Type NPN open collector…

• Page 78: F2-16Td1(2)P, Dc Output With Fault Protection

  Chapter 2: Installation, Wiring and Specifications F2–16TD1(2)P, DC Output With Fault Protection NOTE: Not supported in D2-230, D2-240 and D2-250 CPUs. These modules detect the following fault status and turn the related X bit(s) on. 1. Missing external 24VDC for the module 2.

• Page 79: F2-16Td1P, Dc Output With Fault Protection

  Chapter 2: Installation, Wiring and Specifications F2–16TD1P, DC Output With Fault Protection F2-16TD1P DC Output with Fault Protection NOTE: Not supported in D2-230, D2-240 Inputs per module 16 (status indication) and D2-250 CPUs. Outputs per module 16 (current sinking) Commons per module 1 (2 I/O terminal points) Output type NMOS FET (open drain)

• Page 80: F2-16Td2P, Dc Output With Fault Protection

  Chapter 2: Installation, Wiring and Specifications F2–16TD2P, DC Output with Fault Protection F2-16TD2P DC Output with Fault Protection NOTE: Not supported in D2-230, D2-240 Inputs per module 16 (status indication) and D2-250 CPUs. Outputs per module 16 (current sourcing) Commons per module Output type NMOS FET (open source) NOTE: Supporting Firmware:…

• Page 81: D2-32Td1, Dc Output

  Chapter 2: Installation, Wiring and Specifications D2–32TD1, DC Output D2–32TD2, DC Output D2-32TD1 DC Output D2-32TD2 DC Output Outputs per Module 32 (current sinking) Outputs per Module 32 (current sourcing) Commons per Module 4 (8 I/O terminal points) Commons per Module 4 (8 I/O terminal points) Output Type NPN open collector…

• Page 82: F2-08Ta, Ac Output

  Chapter 2: Installation, Wiring and Specifications F2–08TA, AC Output D2–08TA, AC Output F2-08TA AC Output D2-08TA AC Output Outputs per Module Outputs per Module Commons per Module Commons per Module 2 (Isolated) 1 (2 I/O terminal points) Output Type Output Type SSR (Triac) SSR (Triac with zero crossover) Operating Voltage…

• Page 83: D2-12Ta, Ac Output

  Chapter 2: Installation, Wiring and Specifications D2–12TA, AC Output Max Leakage Current D2-12TA AC Output 2mA (132 VAC, 60 Hz) Max Inrush Current 10A for 10 ms Outputs per Module Base Power Required 5VDC 350 mA Outputs Points Consumed 16 (four unused, see chart below) OFF to ON Response 1 ms Commons per Module…

• Page 84: D2-04Trs, Relay Output

  Chapter 2: Installation, Wiring and Specifications D2–04TRS, Relay Output Max Leakage Current D2-04TRS Relay Output 0.1 mA @ 264 VAC Max Inrush Current 5A for < 10 ms Outputs per Module Base Power Required 5VDC 250 mA Outputs Points Consumed 8 (only 1st 4pts.

• Page 85: D2-08Tr, Relay Output

  Chapter 2: Installation, Wiring and Specifications D2–08TR, Relay Output Max Leakage Current D2-08TR Relay Output 0.1 mA @265 VAC Output: 3A for 10 ms Outputs per Module Max Inrush Current Common: 10A for 10 ms Outputs Points Consumed Base Power Required 5VDC 250 mA Commons per Module 1 (2 I/O terminals)

• Page 86: F2-08Tr, Relay Output

  Chapter 2: Installation, Wiring and Specifications F2–08TR, Relay Output F2-08TR Relay Output Typical Relay Life (Operations) at Room Outputs per Module Temperature Outputs Points Consumed Voltage & Load Current Commons per Module 2 (isolated), 4-pts. per common Type of Load 50mA Output Type 8, Form A (SPST normally open)

• Page 87: F2-08Trs, Relay Output

  Chapter 2: Installation, Wiring and Specifications F2–08TRS, Relay Output F2-08TRS Relay Output Typical Relay Life (Operations) at Room Temperature Outputs per Module Outputs Points Consumed Voltage & Load Current Commons per Module 8 (isolated) Type of Load 50mA 3, Form C (SPDT) Output Type 5, Form A (SPST normally open) 24 VDC Resistive…

• Page 88: D2-12Tr, Relay Output

  Chapter 2: Installation, Wiring and Specifications D2–12TR, Relay Output D2-12TR Relay Output Typical Relay Life (Operations) Outputs per Module Voltage/Load Current Closures Outputs Points Consumed 16 (four unused, see chart below) 24 VDC Resistive 500k Commons per Module 2 (6-pts. per common) 24 VDC Solenoid 100k Output Type…

• Page 89: D2-08Cdr, 4 Pt. Dc Input / 4Pt. Relay Output

  Chapter 2: Installation, Wiring and Specifications D2–08CDR, 4 pt. DC Input / 4pt. Relay Output D2-08CDR 4-pt. DC In / 4pt. Relay Out Output Specifications Outputs per Module General Specifications Outputs Points Consumed 8 (only first 4-pts. are used) Base Power Required 5VDC 200 mA Commons per Module Terminal Type (included)

• Page 90: Glossary Of Specification Terms

  Chapter 2: Installation, Wiring and Specifications Glossary of Specification Terms Inputs or Outputs Per Module Indicates number of input or output points per module and designates current sinking, current sourcing, or either. Commons Per Module Number of commons per module and their electrical characteristics. Input Voltage Range The operating voltage range of the input circuit.

• Page 91
  Chapter 2: Installation, Wiring and Specifications Maximum Leakage Current The maximum current a connected maximum load will receive when the output point is OFF. Maximum Inrush Current The maximum current used by a load for a short duration upon an OFF to ON transition of a output point.
• Page 92
  H PTER H PTER H PTER CPU S PECIFICATIONS AND PERATIONS In This Chapter CPU Overview ………3–2 CPU General Specifications .

• Page 93: Chapter 3: Cpu Specifications And Operations

  Chapter 3: CPU Specifications and Operations CPU Overview The Central Processing Unit is the heart of the PLC. Almost all system operations are controlled by the CPU, so it is important that it is set-up and installed correctly. This chapter provides the information needed to understand: •…

• Page 94: Dl250-1 Cpu Features

  Chapter 3: CPU Specifications and Operations DL250–1 CPU Features The DL250–1 replaces the DL250 CPU. It offers all the DL240 features, plus more program instructions and a built–in Remote I/O Master port. It offers all the features of the DL250 CPU with the addition of supporting Local expansion I/O.

• Page 95: Cpu General Specifications

  Chapter 3: CPU Specifications and Operations CPU General Specifications Feature DL230 DL240 DL250–1 DL260 Total Program memory (words) 2.4K 3.8K 14.8K 30.4K Ladder memory (words) 2048 2560 7680 (Flash) 15872 (Flash) V-memory (words) 1024 7168 14592 Non-volatile V Memory (words) Boolean execution /K 4–6 ms 10–12 ms…

• Page 96: Cpu Base Electrical Specifications

  Chapter 3: CPU Specifications and Operations Feature DL230 DL240 DL250–1 DL260 Number of instructions available (see Chapter 5 for details) Control relays 1024 2048 Special relays (system defined) PLUS Stages in RLL 1024 1024 Timers Counters Immediate I/O Interrupt input (hardware / timed) Yes / No Yes / Yes Yes / Yes…

• Page 97: Cpu Hardware Setup

  Chapter 3: CPU Specifications and Operations CPU Hardware Setup Communication Port Pinout Diagrams Cables are available that allow you to quickly and easily connect a Handheld Programmer or a personal computer to the DL205 CPUs. However, if you need to build a cable(s), use the pinout descriptions shown on the following pages.

• Page 98: Port 1 Specifications

  Chapter 3: CPU Specifications and Operations Port 1 Specifications The operating parameters for Port 1 on the DL230 and DL240 CPUs are fixed. • 6-pin female modular (RJ12 phone jack) type connector • K–sequence protocol (slave only) 250-1 • RS-232, 9600 baud •…

• Page 99: Port 2 Specifications

  Chapter 3: CPU Specifications and Operations Port 2 Specifications The operating parameters for Port 2 on the DL240 CPU are configurable using Aux functions on a programming device. • 6-Pin female modular (RJ12 phone jack) 250-1 type connector • K–sequence protocol, DirectNET (slave), •…

• Page 100: Selecting The Program Storage Media

  Chapter 3: CPU Specifications and Operations Selecting the Program Storage Media Built-in EEPROM The DL230 and DL240 CPUs provide built-in EEPROM storage. This type of memory is non-volatile and is not dependent on battery backup to retain the program. The EEPROM can be electrically reprogrammed without being removed from the CPU.

• Page 101: Installing The Cpu

  Chapter 3: CPU Specifications and Operations Installing the CPU The CPU must be installed in the first slot in the base (closest to the power supply). You cannot install the CPU in any other slot. When inserting the CPU into the base, align the PC board with the grooves on the top and bottom of the base.

• Page 102: Cpu Setup Information

  Chapter 3: CPU Specifications and Operations Status Indicators Mode Switch BATT BATT DL240 Port 1 DL230 TERM Analog Adjustments PORT 1 Port 2 PORT1 PORT? 2 Status Indicators DL260 DL250-1 Mode Switch Port 1 Port 2 Battery Slot CPU Setup Information Even if you have years of experience using PLCs, there are a few things you need to do before you can start entering programs.

• Page 103: Status Indicators

  Chapter 3: CPU Specifications and Operations Status Indicators The status indicator LEDs on the CPU front panels have specific functions which can help in programming and troubleshooting. Indicator Status Meaning Power good Power failure CPU is in Run Mode CPU is in Stop or program Mode Blinking CPU is in Firmware Upgrade Mode CPU self diagnostics error…

• Page 104: Changing Modes In The Dl205 Plc

  Chapter 3: CPU Specifications and Operations Changing Modes in the DL205 PLC Mode Switch Position CPU Action CPU is forced into the RUN mode if no errors are encountered. RUN (Run Program) No changes are allowed by the attached programming/monitoring device. PROGRAM and the TEST modes are available.

• Page 105: Using Battery Backup

  Chapter 3: CPU Specifications and Operations Using Battery Backup An optional lithium battery is available to maintain the system RAM retentive memory when the DL205 system is without external power. Typical CPU battery life is five years, which includes PLC runtime and normal shutdown periods. However, consider installing a fresh battery if your battery has not been changed recently and the system will be shut down for a period of more than ten days.

• Page 106: Auxiliary Functions

  Chapter 3: CPU Specifications and Operations Auxiliary Functions Many CPU setup tasks involve the use of Auxiliary (AUX) Functions. The AUX Functions perform many different operations, including clearing ladder memory, displaying the scan time, copying programs to EEPROM in the handheld programmer, etc. They are divided into categories that affect different system parameters.

• Page 107: Clearing An Existing Program

  Chapter 3: CPU Specifications and Operations Clearing an Existing Program Before you enter a new program, you should always clear ladder memory. You can use AUX Function 24 to clear the complete program. You can also use other AUX functions to clear other memory areas. AUX 23 —…

• Page 108
  Chapter 3: CPU Specifications and Operations Setting the CPU Network Address The DL240, DL250–1 and DL260 CPUs have built in DirectNet ports. You can use the Handheld Programmer to set the network address for the port and the port communication parameters.
• Page 109
  Chapter 3: CPU Specifications and Operations Using a Password The DL205 CPUs allow you to use a password to help minimize the risk of unauthorized program and/or data changes. Once you enter a password you can “lock” the CPU against access.
• Page 110
  Chapter 3: CPU Specifications and Operations Setting the Analog Potentiometer Ranges There are 4 analog potentiometers (pots) on the face plate of the DL240 CPU. These pots can BATT be used to change timer constants, frequency of 250-1 pulse train output, value for an analog output TERM module, etc.
• Page 111
  Chapter 3: CPU Specifications and Operations The following example shows how you could use these analog potentiometers to change the preset value for a timer. See Chapter 5 for details on how these instructions operate. Program loads ranges into V-memory DirectSOFT K100 Load the lower limit (100) for the analog range on Ch1 into V7640.

• Page 112: Cpu Operation

  Chapter 3: CPU Specifications and Operations CPU Operation Achieving the proper control for your equipment or process requires a good understanding of how DL205 CPUs control all aspects of system operation. The flow chart below shows the main tasks of the CPU operating system. In this section, we will investigate four aspects of CPU operation: Power up •…

• Page 113
  Chapter 3: CPU Specifications and Operations Program Mode Operation In Program Mode the CPU does not execute X0 _ Y0 _ the application program or update the output modules. The primary use for Program Mode is to enter or change an application program. You also use the program mode to set up CPU parameters, such as the network address, retentive memory areas, etc.
• Page 114
  Chapter 3: CPU Specifications and Operations Read Inputs The CPU reads the status of all inputs, then stores it in the image register. Input image register locations are designated with an X followed by a memory location. Image register data is used by the CPU when it solves the application program.
• Page 115
  Chapter 3: CPU Specifications and Operations Bit Override — (DL240, DL250–1 and DL260) Bit override can be enabled on a point-by- point basis by using AUX 59 from the Handheld Programmer or, by a menu option from within DirectSOFT. Bit override basically disables any changes to the discrete point by the CPU.
• Page 116
  Chapter 3: CPU Specifications and Operations Solve Application Program The CPU evaluates each instruction in the application Read Inputs program during this segment of the scan cycle. The instructions define the relationship between input Read Inputs from Specialty I/O conditions and the system outputs. Service Peripherals, Force I/O The CPU begins with the first rung of the ladder program, evaluating it from left to right and from top to…
• Page 117
  Chapter 3: CPU Specifications and Operations Write Outputs to Specialty and Remote I/O After the CPU updates the outputs in the local and expansion bases, it sends the output point information that is required by any Specialty modules which are installed. For example, this is the portion of the scan that writes the output status from the image register to the Remote I/O racks.

• Page 118: I/O Response Time

  Chapter 3: CPU Specifications and Operations I/O Response Time Is Timing Important for Your Application? I/O response time is the amount of time required for the control system to sense a change in an input point and update a corresponding output point. In the majority of applications, the CPU performs this task practically instantaneously.

• Page 119
  Chapter 3: CPU Specifications and Operations Scan Solve Solve Solve Solve Scan Program Program Program Program Read Write Inputs Outputs Field Input CPU Reads CPU Writes Inputs Outputs Input Module Off/On Delay Output Module Off/On Delay I/O Response Time Improving Response Time There are a few things you can do the help improve throughput.

• Page 120: Cpu Scan Time Considerations

  Chapter 3: CPU Specifications and Operations CPU Scan Time Considerations The scan time covers all the cyclical tasks Power up that are performed by the operating system. You can use DirectSOFT or the Handheld Initialize hardware Programmer to display the minimum, maximum, and current scan times that have Check I/O module occurred since the previous Program Mode…

• Page 121
  Chapter 3: CPU Specifications and Operations Initialization Process The CPU performs an initialization task once the system power is on. The initialization task is performed once at power-up, so it does not affect the scan time for the application program. Initialization DL230 DL240…
• Page 122
  Chapter 3: CPU Specifications and Operations Reading Inputs from Specialty I/O During this portion of the cycle the CPU reads any input points associated with the following: • Remote I/O • Specialty Modules (such as High-Speed Counter, etc.) The time required to read any input status from these modules depends on which CPU you are using, the number of modules, and the number of input points.
• Page 123
  Chapter 3: CPU Specifications and Operations During the Service Peripherals portion of the scan, the CPU analyzes the communications request and responds as appropriate. The amount of time required to service the peripherals depends on the content of the request. To Service Request DL230 DL240…
• Page 124
  Chapter 3: CPU Specifications and Operations Writing Outputs to Specialty I/O During this portion of the cycle the CPU writes any output points associated with the following. • Remote I/O • Specialty Modules (such as High-Speed Counter, etc.) The time required to write any output image register data to these modules depends on which CPU you are using, the number of modules, and the number of output points.
• Page 125
  Chapter 3: CPU Specifications and Operations Application Program Execution The CPU processes the program from the top (address 0) to the END instruction. The CPU executes the program left to right and top to bottom. As each rung is evaluated the appropriate image register or memory location is updated.

• Page 126: Plc Resources

  Chapter 3: CPU Specifications and Operations PLC Numbering Systems 49.832 binary octal 1482 If you are a new PLC user or are using DirectLOGIC 0402 PLCs for the first time, please take a moment to study ASCII how our PLCs use numbers. You’ll find that each PLC hexadecimal 1001011011 manufacturer has their own conventions on the use of…

• Page 127: V-Memory

  Chapter 3: CPU Specifications and Operations V–Memory Variable memory (called “V-memory”) stores data for the ladder program and for configuration settings. V-memory locations and V-memory addresses are the same thing, and are numbered in octal. For example, V2073 is a valid location, while V1983 is not valid (“9” and “8” are not valid octal digits). Each V-memory location is one data word wide, meaning 16 bits.

• Page 128: Memory Map

  Chapter 3: CPU Specifications and Operations Memory Map With any PLC system, you generally have many different types of information to process. This includes input device status, output device status, various timing elements, parts counts, etc. It is important to understand how the system represents and stores the various types of data.

• Page 129: Input Points (X Data Type)

  Chapter 3: CPU Specifications and Operations Input Points (X Data Type) The discrete input points are noted by an X data type. There are up to 512 discrete input points available with the DL205 CPUs. In this example, the output point Y0 will be turned on when input X0 energizes.

• Page 130: Timer Current Values (V Data Type)

  Chapter 3: CPU Specifications and Operations Timer Current Values (V Data Type) Some information is automatically stored in V-memory, such as the current values associated with timers. For K1000 example, V0 holds the current value for Timer 0, V1 holds the current value for Timer 1, etc. These are 4- digit BCD values.

• Page 131: Stages (S Data Type)

  Chapter 3: CPU Specifications and Operations Stages (S Data type) Wait forStart S0000 Stages are used in RLL PLUS programs to create a structured program, similar to a flowchart. Each Start program stage denotes a program segment. When S500 the program segment, or stage, is active, the logic within that segment is executed.

• Page 132: Dl230 System V-Memory

  Chapter 3: CPU Specifications and Operations DL230 System V-memory System Description of Contents Default Values/Ranges V-memory V2320–V2377 The default location for multiple preset values for the UP counter. V7620–V7627 Locations for DV–1000 operator interface parameters V7620 Sets the V-memory location that contains the value. V0 –…

• Page 133
  Chapter 3: CPU Specifications and Operations System Description of Contents Default Values/Ranges V-memory I/O Configuration Error — stores the module ID code for the module that V7752 does not match the current configuration. V7753 I/O Configuration Error — stores the correct module ID code. V7754 I/O Configuration Error —…

• Page 134: Dl240 System V-Memory

  Chapter 3: CPU Specifications and Operations DL240 System V-memory System Default Description of Contents V-memory Values/Ranges V3630–V3707 The default location for multiple preset values for UP/DWN and UP counter 1 or pulse output function. V3710–V3767 The default location for multiple preset values for UP/DWN and UP counter 2. V3770–V3773 Not used V3774–V3777 Default locations for analog potentiometer data (channels 1–4, respectively).

• Page 135
  Chapter 3: CPU Specifications and Operations System Default Description of Contents V-memory Values/Ranges V7633 Sets the desired mode for the high speed counter, interrupt, pulse catch, pulse train, Default: 0000 and input filter (see the D2-CTRINT manual, D2-CTRIF-M, for more information). Lower Byte Range: Location is also used for setting the with/without battery option, enable/disable CPU 0 –…
• Page 136
  Chapter 3: CPU Specifications and Operations System Description of Contents V-memory V7753 I/O Configuration Error — stores the correct module ID code. V7754 I/O Configuration Error — identifies the base and slot number. V7755 Error code — stores the fatal error code. V7756 Error code —…

• Page 137: Dl250-1 System V-Memory (Dl250 Also)

  Chapter 3: CPU Specifications and Operations DL250–1 System V-memory (DL250 also) System Default Description of Contents V-memory Values/Ranges The default location for multiple preset values for UP/DWN and UP counter 1 or pulse V3630–V3707 output function V3710–V3767 The default location for multiple preset values for UP/DWN and UP counter 2. V3770–V3777 Not used V7620–V7627…

• Page 138
  Chapter 3: CPU Specifications and Operations System Description of Contents Default Values/Ranges V-memory Contains set up information for high speed counter, interrupt, pulse catch, V7637 Default: 1006 pulse train output, and input filter for X3 (when D2–CTRINT is installed). V1400–V7340 V7640 Loop Table Beginning address V10000–V17740…
• Page 139
  Chapter 3: CPU Specifications and Operations System Description of Contents V-memory V7766 Contains the number of seconds on the clock. (00 to 59) V7767 Contains the number of minutes on the clock. (00 to 59) V7770 Contains the number of hours on the clock. (00 to 23) V7771 Contains the day of the week.

• Page 140: Dl260 System V-Memory

  Chapter 3: CPU Specifications and Operations DL260 System V-memory System Description of Contents Default Values/Ranges V-memory The default location for multiple preset values for UP/DWN and UP counter 1 or V3630–V3707 pulse output function V3710–V3767 The default location for multiple preset values for UP/DWN and UP counter 2 V3770–V3777 Not used V7620–V7627…

• Page 141
  Chapter 3: CPU Specifications and Operations System Default Description of Contents V-memory Values/Ranges Contains set up information for high speed counter, interrupt, pulse catch, pulse train V7637 Default: 1006 output, and input filter for X3 (when D2–CTRINT is installed). V400–640 V7640 PID Loop Table Beginning address V1400–V7340…
• Page 142
  Chapter 3: CPU Specifications and Operations System Description of Contents V-memory V7766 Contains the number of seconds on the clock.(00 to 59). V7767 Contains the number of minutes on the clock.(00 to 59). V7770 Contains the number of hours on the clock.(00 to 23). V7771 Contains the day of the week.

• Page 143: Dl205 Aliases

  Chapter 3: CPU Specifications and Operations DL205 Aliases An alias is an alternate way of referring to certain memory types, such as timer/counter current values, V-memory locations for I/O points, etc., which simplifies understanding the memory address. The use of the alias is optional, but some users may find the alias to be helpful when developing a program.

• Page 144: Dl230 Memory Map

  Chapter 3: CPU Specifications and Operations DL230 Memory Map Discrete Memory Word Memory Memory Type Qty. Decimal Symbol Reference (octal) Reference (octal) 128 1 Input Points X0 – X177 V40400 – V40407 128 1 Output Points Y0 – Y177 V40500 – V40507 Control Relays C0 –…

• Page 145: Dl240 Memory Map

  Chapter 3: CPU Specifications and Operations DL240 Memory Map Discrete Memory Word Memory Memory Type Qty. Decimal Symbol Reference (octal) Reference(octal) Input Points X0 – X477 V40400 – V40423 Output Points Y0 – Y477 V40500 – V40523 Control Relays C0 – C377 V40600 –…

• Page 146: Dl250-1 Memory Map (Dl250 Also)

  Chapter 3: CPU Specifications and Operations DL250–1 Memory Map (DL250 also) Discrete Memory Word Memory Memory Type Qty. Decimal Symbol Reference (octal) Reference (octal) Input Points X0 – X777 V40400 – V40437 Output Points Y0 – Y777 V40500 – V40537 Control Relays C0 –…

• Page 147: Dl260 Memory Map

  Chapter 3: CPU Specifications and Operations DL260 Memory Map Discrete Memory Word Memory Memory Type Qty. Decimal Symbol Reference (octal) Reference (octal) Input Points X0 – X1777 V40400 – V40477 1024 Output Points Y0 – Y1777 V40500 – V40577 1024 Control Relays C0 –…

• Page 148: Input/Y Output Bit Map

  Chapter 3: CPU Specifications and Operations X Input/Y Output Bit Map This table provides a listing of the individual Input points associated with each V-memory address bit for the DL230, DL240, and DL250–1 and DL260 CPUs. The DL250–1 ranges apply to the DL250. DL230/DL240/DL250-1/DL260 Input (X) and Output (Y) Points LSB X Input Y Output…

• Page 149
  Chapter 3: CPU Specifications and Operations Additional DL260 Input (X) and Output (Y) Points LSB X Input Y Output Address Address 1017 1016 1015 1014 1013 1012 1011 1010 1007 1006 1005 1004 1003 1002 1001 1000 V40440 V40540 V40441 V40541 1037 1036 1035 1034 1033 1032 1031 1030 1027 1026 1025 1024 1023 1022 1021 1020 V40442 V40542 1057 1056 1055 1054 1053 1052 1051 1050 1047 1046 1045 1044 1043 1042 1041 1040…

• Page 150: Control Relay Bit Map

  Chapter 3: CPU Specifications and Operations Control Relay Bit Map This table provides a listing of the individual control relays associated with each V-memory address bit. DL230/DL240/DL250-1/DL260 Control Relays (C) Address V40600 V40601 V40602 V40603 V40604 V40605 V40606 V40607 V40610 V40611 V40612 V40613…

• Page 151
  Chapter 3: CPU Specifications and Operations Additional DL250-1/DL260 Control Relays (C) Address V40640 1017 1016 1015 1014 1013 1012 1011 1010 1007 1006 1005 1004 1003 1002 1001 1000 V40641 1037 1036 1035 1034 1033 1032 1031 1030 1027 1026 1025 1024 1023 1022 1021 1020 V40642 1057 1056 1055 1054 1053 1052 1051 1050 1047 1046 1045 1044 1043 1042 1041 1040 V40643…
• Page 152
  Chapter 3: CPU Specifications and Operations This portion of the table shows additional Control Relays points available with the DL260. Additional DL260 Control Relays (C) Address V40700 2017 2016 2015 2014 2013 2012 2011 2010 2007 2006 2005 2004 2003 2002 2001 2000 V40701 2037 2036 2035 2034 2033 2032 2031 2030 2027 2026 2025 2024 2023 2022 2021 2020 V40702…
• Page 153
  Chapter 3: CPU Specifications and Operations Additional DL260 Control Relays (C) Address V40740 3017 3016 3015 3014 3013 3012 3011 3010 3007 3006 3005 3004 3003 3002 3001 3000 V40741 3037 3036 3035 3034 3033 3032 3031 3030 3027 3026 3025 3024 3023 3022 3021 3020 V40742 3057 3056 3055 3054 3053 3052 3051 3050 3047 3046 3045 3044 3043 3042 3041 3040 V40743…

• Page 154: Stage Control/Status Bit Map

  Chapter 3: CPU Specifications and Operations Stage Control/Status Bit Map This table provides a listing of the individual Stage control bits associated with each V- memory address. DL230/DL240/DL250-1/DL260 Stage (S) Control Bits Address V41000 V41001 V41002 V41003 V41004 V41005 V41006 V41007 V41010 V41011…

• Page 155
  Chapter 3: CPU Specifications and Operations Additional DL250-1/DL260 Stage (S) Control Bits Address V41040 1017 1016 1015 1014 1013 1012 1011 1010 1007 1006 1005 1004 1003 1002 1001 1000 1037 1036 1035 1034 1033 1032 1031 1030 1027 1026 1025 1024 1023 1022 1021 1020 V41041 V41042 1057 1056 1055 1054 1053 1052 1051 1050 1047 1046 1045 1044 1043 1042 1041 1040…

• Page 156: Timer And Counter Status Bit Maps

  Chapter 3: CPU Specifications and Operations Timer and Counter Status Bit Maps This table provides a listing of the individual timer and counter contacts associated with each V-memory address bit. DL230/DL240/DL250-1/DL260 Timer (T) and Counter (CT) Contacts LSB Timer Counter Address Address V41100…

• Page 157: Remote I/O Bit Map

  Chapter 3: CPU Specifications and Operations Remote I/O Bit Map This table provides a listing of the individual remote I/O points associated with each V-memory address bit. DL260 Remote I/O (GX) and (GY) Points Address Address V40000 V40200 016 015 014 013 012 011 010 007 006 005 004 003 002 001 000 V40001 V40201 036 035 034 033 032 031 030 027 026 025 024 023 022 021 020…

• Page 158
  Chapter 3: CPU Specifications and Operations DL260 Remote I/O (GX) and (GY) Points Address Address V40040 V40240 1017 1016 1015 1014 1013 1012 1011 1010 1007 1006 1005 1004 1003 1002 1001 1000 1037 1036 1035 1034 1033 1032 1031 1030 1027 1026 1025 1024 1023 1022 1021 1020 V40041 V40241 V40042 V40242 1057 1056 1055 1054 1053 1052 1051 1050 1047 1046 1045 1044 1043 1042 1041 1040…
• Page 159
  Chapter 3: CPU Specifications and Operations DL260 Remote I/O (GX) and (GY) Points Address Address V40100 V40300 2017 2016 2015 2014 2013 2012 2011 2010 2007 2006 2005 2004 2003 2002 2001 2000 V40101 V40301 2037 2036 2035 2034 2033 2032 2031 2030 2027 2026 2025 2024 2023 2022 2021 2020 2057 2056 2055 2054 2053 2052 2051 2050 2047 2046 2045 2044 2043 2042 2041 2040 V40102 V40302 V40103 V40303…
• Page 160
  Chapter 3: CPU Specifications and Operations DL260 Remote I/O (GX) and (GY) Points Address Address V40140 V40340 3017 3016 3015 3014 3013 3012 3011 3010 3007 3006 3005 3004 3003 3002 3001 3000 V40141 V40341 3037 3036 3035 3034 3033 3032 3031 3030 3027 3026 3025 3024 3023 3022 3021 3020 V40142 V40342 3057 3056 3055 3054 3053 3052 3051 3050 3047 3046 3045 3044 3043 3042 3041 3040 V40143 V40343…
• Page 161
  H PTER H PTER H PTER YSTEM ESIGN AND ONFIGURATION In This Chapter: DL205 System Design Strategies ……4–2 Module Placement .

• Page 162: Dl205 System Design Strategies

  Chapter 4: System Design and Configuration DL205 System Design Strategies I/O System Configurations The DL205 PLCs offer the following ways to add I/O to the system: • Local I/O – consists of I/O modules located in the same base as the CPU. •…

• Page 163: Module Placement

  Chapter 4: System Design and Configuration Module Placement Slot Numbering The DL205 bases each provide different numbers of slots for use with the I/O modules. You may notice the bases refer to 3-slot, 4-slot, etc. One of the slots is Slot 0 Slot 1 Slot 2 Slot 3 Slot 4 dedicated to the CPU, so you always have one less I/O slot.

• Page 164
  Chapter 4: System Design and Configuration Automatic I/O Configuration The DL205 CPUs automatically detect any installed I/O modules (including specialty modules) at powerup, and establish the correct I/O configuration and addresses. This applies to modules located in local and local expansion I/O bases. For most applications, you will never have to change the configuration.
• Page 165
  Chapter 4: System Design and Configuration Removing a Manual Configuration After a manual configuration, the system will automatically retain the new I/O addresses through a power cycle. You can remove (overwrite) any manual configuration changes by changing all of the manually configured addresses back to automatic. Power–On I/O Configuration Check The DL205 CPUs can also be set to automatically check the I/O configuration on power-up.
• Page 166
  Chapter 4: System Design and Configuration I/O Points Required for Each Module Each type of module requires a certain number of I/O points. This is also true for some specialty modules, such as analog, counter interface, etc.. DC Input Modules Number of I/O Pts.

• Page 167: Calculating The Power Budget

  Chapter 4: System Design and Configuration Calculating the Power Budget Managing your Power Resource When you determine the types and quantity of I/O modules you will be using in the DL205 system it is important to remember there is a limited amount of power available from the power supply.

• Page 168
  Chapter 4: System Design and Configuration Power Consumed Power Consumed 24V Auxilliary 24V Auxilliary Device 5V (mA) Device 5V (mA) (mA) (mA) CPUs Combination Modules D2–230 D2–08CDR Specialty Modules D2–240 D2–250–1 H2–PBC D2–260 H2–ECOM DC Input Modules H2–ECOM100 D2–08ND3 H2–ECOM-F D2–16ND3–2 H2–ERM(100) D2–32ND3(–2)
• Page 169
  Chapter 4: System Design and Configuration Power Budget Calculation Example The following example shows how to calculate the power budget for the DL205 system. Auxiliary Base # Module Type 5 VDC (mA) Power Source 24 VDC Output (mA) Available Base Power D2–09B–1 2600 CPU Slot…
• Page 170
  Chapter 4: System Design and Configuration Power Budget Calculation Worksheet This blank chart is provided for you to copy and use in your power budget calculations. Auxiliary Base # Module Type 5 VDC (mA) Power Source 24 VDC Output (mA) Available Base Power CPU Slot Slot 0…

• Page 171: Local Expansion I/O

  Chapter 4: System Design and Configuration Local Expansion I/O Use local expansion when you need more I/O points, a greater power budget than the local CPU base provides or when placing an I/O base at a location away from the CPU base, but within the expansion cable limits.

• Page 172
  Chapter 4: System Design and Configuration D2–EM Local Expansion Module The D2–EM expansion unit is attached to the right side of each base in the expansion system, including the local CPU base. (All bases in the local expansion system must be the new (–1) bases).
• Page 173
  Chapter 4: System Design and Configuration DL260 Local Expansion System The D2–260 supports local expansion up to five total bases ( one CPU base + four local expansion bases) and up to a maximum of 1280 total I/O points. An example local expansion system is shown below.
• Page 174
  Chapter 4: System Design and Configuration NOTE: When applying power to the CPU (DL250–1/260) and local expansion bases, make sure the expansion bases power up at the same time or before the CPU base. Expansion bases that power up after the CPU base will not be recognized by the CPU.
• Page 175
  Chapter 4: System Design and Configuration Expansion Base Output Hold Option The bit settings in V–memory registers V7741 and V7742 determine the expansion bases’ outputs response to a communications failure. The CPU will exit the RUN mode to the STOP mode when an expansion base communications failure occurs. If the Output Hold bit is ON, the outputs on the corresponding module will hold their last state when a communication error occurs.
• Page 176
  Chapter 4: System Design and Configuration Enabling I/O Configuration Check using DirectSOFT Enabling the I/O Config Check will force the CPU, at power up, to examine the local and expansion I/O configuration before entering the RUN mode. If there is a change in the I/O configuration, the CPU will not enter the RUN mode.

• Page 177: Expanding Dl205 I/O

  Chapter 4: System Design and Configuration Expanding DL205 I/O I/O Expansion Overview Expanding I/O beyond the local chassis is useful for a system which has a sufficient number of sensors and other field devices located a relatively long distance from the CPU. There are two forms of communication which can be used to add remote I/O to your system;…

• Page 178
  Chapter 4: System Design and Configuration Ethernet Remote Master Hardware Configuration Use a PC equipped with a 10/100BaseT or a 10BaseFL network adapter card and the Ethernet Remote Master (ERM) Workbench software configuration utility (included with the ERM manual, H24-ERM-M) to configure the ERM module and its slaves over the Ethernet remote I/O network.
• Page 179
  Chapter 4: System Design and Configuration Installing the ERM Module This section will briefly describe the installation of the ERM module. More detailed information is available in the Ethernet Remote Master Module manual, H24-ERM-M, which will be needed to configure the communication link to the remote I/O. In addition to the manual, configuration software will be needed.
• Page 180
  Chapter 4: System Design and Configuration Insert the ERM Module The DL205 system only supports the placement of the ERM module in the CPU base. It does not support installation of the ERM module in either local expansion or remote I/O bases.
• Page 181
  Chapter 4: System Design and Configuration 10/100BaseT Networks A patch (straight-through) cable is used to connect a PLC (or PC) to a hub or to a repeater. Use a crossover cable to connect two Ethernet devices (point-to-point) together. It is recommended that pre-assembled cables be purchased for convenient and reliable networking.
• Page 182
  Chapter 4: System Design and Configuration Ethernet Base Controller, H2-EBC(100)(-F) The Ethernet Base Controller module, H2-EBC(100)(-F) provides a low-cost, high- performance Ethernet link between a network master controller and an DirectLOGIC PLC I/O slave system. Also, the H2-EBC100 supports the Modbus TCP/IP client/server protocol. The Ethernet Base Controller (EBC) serves as an interface between the master control system and the DL205/405 I/O modules.
• Page 183
  Chapter 4: System Design and Configuration Install the EBC Module Like the ERM module discussed in the previous section, this will briefly describe the installation of the H2 Series EBCs. More detailed information is available in the Ethernet Base Controller manual, H24-EBC-M, which will be needed to configure the remote I/O. Each EBC module must be assigned at least one unique identifier to make it possible for master controllers to recognize it on the network.
• Page 184
  Chapter 4: System Design and Configuration Network Cabling Of the two types of EBC modules available, one supports the 10/100BaseT standard and the other one supports the 10BaseFL standard. The 10/100BaseT standard uses twisted pairs of copper wire conductors and the 10BaseFL standard is used with fiber optic cabling. 10/100BaseT RJ12 Serial…

• Page 185: 10Basefl Network Cabling

  Chapter 4: System Design and Configuration 10BaseFL Network Cabling The H2-EBC-F and the H2-ERM-F modules have two ST-style bayonet connectors. The ST- style connector uses a quick release coupling which requires a quarter turn to engage or disengage. The connectors provide mechanical and optical alignment of fibers. Each cable segment requires two strands of fiber;…

• Page 186: Add A Serial Remote I/O Master/Slave Module

  Chapter 4: System Design and Configuration Add a Serial Remote I/O Master/Slave Module In addition to the I/O located in the local base, adding remote I/O can be accomplished via a shielded twisted-pair cable linking the master CPU to a remote I/O base. The methods of adding serial remote I/O are: •…

• Page 187: Configuring The Cpu’s Remote I/O Channel

  Chapter 4: System Design and Configuration Configuring the CPU’s Remote I/O Channel This section describes how to configure the DL250–1 and DL260’s built-in remote I/O channel. Additional information is in the Remote I/O manual, D2–REMIO–M, which you will need in configuring the Remote slave units on the network. You can use the D2–REMIO–M manual exclusively when using regular Remote Masters and Remote Slaves for remote I/O in any DL205 system.

• Page 188
  Chapter 4: System Design and Configuration The next step is to make the connections between all devices on the Remote I/O link. The location of Port 2 on the DL250–1 and DL260 is on the 15-pin connector , as pictured to the right. DL260 •…

• Page 189: Configure Remote I/O Slaves

  Chapter 4: System Design and Configuration Configure Remote I/O Slaves After configuring the DL250–1 or DL260 CPU’s Port 2 and wiring it to the remote slave(s), use the following checklist to complete the configuration of the remote slaves. Full instructions for these steps are in the Remote I/O manual. •…

• Page 190: Remote I/O Setup Program

  Chapter 4: System Design and Configuration Consider the simple system featuring Remote I/O shown below. The DL250–1 or DL260’s built-in Remote I/O channel connects to one slave base, which we will assign a station address=1. The baud rates on the master and slave will be 38.4KB. We can map the remote I/O points as any type of I/O point, simply by choosing the appropriate range of V-memory.

• Page 191: Remote I/O Test Program

  Chapter 4: System Design and Configuration When configuring a Remote I/O channel for DirectSOFT fewer than 7 slaves, we must fill the remainder of the table with zeros. This is necessary because the CPU will try to interpret any non-zero number as slave OUTD information.

• Page 192: Network Connections To Modbus And Directnet

  Chapter 4: System Design and Configuration Network Connections to Modbus and irectNET Configuring Port 2 For D D i i r r e e c c t t NET This section describes how to configure the CPU’s built-in networking ports for either Modbus or DirectNET.

• Page 193: Modbus Port Configuration

  Chapter 4: System Design and Configuration Modbus Port Configuration In DirectSOFT, choose the PLC menu, then Setup, then “Secondary Comm Port”. • Port: From the port number list box at the top, choose “Port 2”. • Protocol: Click the check box to the left of “MODBUS” (use AUX 56 on the HPP, and select “MBUS”), and then you’ll see the dialog box below.

• Page 194
  Chapter 4: System Design and Configuration D D i i r r e e c c t t NET Port Configuration In DirectSOFT, choose the PLC menu, then Setup, then “Secondary Comm Port”. • Port: From the port number list box, choose “Port 2 ”. •…

• Page 195: Network Slave Operation

  NOTE: For information about the Modbus protocol see www.Modbus.org and select Technical Resources. For more information about the DirectNET protocol, order our DirectNET User Manual, DA-DNET-M, or download the manual free from our website: www.automationdirect.com. Select Manuals/Docs>Online User Manuals>Misc.>DA-DNET-M 4–35…

• Page 196
  Chapter 4: System Design and Configuration DL250–1 Memory Modbus Address QTY (Dec.) PLC Range (Octal) Modbus Data Type Type Range (Decimal) For Discrete Data Types ….. Convert PLC Addr. to Dec. Start of Range Data Type Inputs (X) X0 – X777 2048 –…
• Page 197
  Chapter 4: System Design and Configuration The following examples show how to generate the Modbus address and data type for hosts which require this format. Example 1: V2100 PLC Address (Dec.) + Data Type Find the Modbus address for User V2100 = 1088 decimal V location V2100.

• Page 198: If Your Modbus Host Software Requires An Address Only

  Chapter 4: System Design and Configuration If Your Modbus Host Software Requires an Address ONLY Some host software does not allow you to specify the Modbus data type and address. Instead, you specify an address only. This method requires another step to determine the address, but it is not difficult.

• Page 199
  1. Refer to your PLC user manual for the correct memory size of your PLC. Some of the addresses shown above might not pertain to your particular CPU. 2. For an automated Modbus/Koyo address conversion utility, search and download the file modbus_conversion.xls from the www.automationdirect.com website. 4–39 DL205 User Manual, 4th Edition, Rev. B…

• Page 200: Example 1: V2100 584/984 Mode

  Chapter 4: System Design and Configuration Example 1: V2100 584/984 Mode PLC Address (Dec.) + Mode Address Find the Modbus address for User V location V2100. V2100 = 1088 decimal 1. Find V memory in the table 1088 + 40001 = 41089 2.

• Page 201: Network Master Operation

  Chapter 4: System Design and Configuration Network Master Operation This section describes how the DL250–1 and DL260 can communicate on a Modbus or DirectNET network as a master. For Modbus networks, it uses the Modbus RTU protocol, which must be interpreted by all the slaves on the network. Both Modbus and DirectNET are single master/multiple slave networks.

• Page 202
  Chapter 4: System Design and Configuration Step 1: Identify Master Port # and Slave # The first Load (LD) instruction identifies the communications port number on the network Slave Address (BCD) master (DL250-1/260) and the address of the CPU bottom port (BCD) slave station.
• Page 203
  Chapter 4: System Design and Configuration Step 3: Specify Master Memory Area (octal) The third instruction in the RX or WX sequence is a Load Address (LDA) instruction. Its purpose is to load the starting address of the memory area to be Starting address of transferred.

• Page 204: Communications From A Ladder Program

  Chapter 4: System Design and Configuration Communications from a Ladder Program Typically, network communications will last Port Communication Error longer than one scan. The program must wait for the communications to finish before SP117 starting the next transaction. Port 2, which can be a master, has two SP116 Special Relay contacts associated with it.

• Page 205: Network Modbus Rtu Master Operation (Dl260 Only)

  Chapter 4: System Design and Configuration Network Modbus RTU Master Operation (DL260 only) This section describes how the DL260 can communicate on a Modbus RTU network as a master using the MRX and MWX read/write instructions. These instructions allow you to enter native Modbus addressing in your ladder logic program with no need to perform octal to decimal conversions.

• Page 206: Modbus Port Configuration

  Chapter 4: System Design and Configuration Modbus Port Configuration In DirectSOFT, choose the PLC menu, then Setup, then “Secondary Comm Port”. • Port: From the port number list box at the top, choose “Port 2”. • Protocol: Click the check box to the left of “MODBUS” (use AUX 56 on the HPP, and select “MBUS”), and then you’ll see the dialog box below.

• Page 207: Network (Modbus Only)

  Chapter 4: System Design and Configuration RS–485 Network (Modbus only) RS–485 signals are for longer distances (1000 meters max.), and for multi-drop networks. Use termination resistors at both ends of RS–485 network wiring, matching the impedance rating of the cable (between 100 and 500 ohms). 250-1 T ermination Resistor…

• Page 208: Modbus Read From Network (Mrx)

  Chapter 4: System Design and Configuration Modbus Read from Network (MRX) The Modbus Read from Network (MRX) instruction is used by the DL260 network master to read a block of data from a connected slave device and to write the data into V–memory addresses within the master.

• Page 209: Mrx Slave Memory Address

  Chapter 4: System Design and Configuration MRX Slave Memory Address MRX Slave Address Ranges Function Code Modbus Data Format Slave Address Range(s) 01 – Read Coil 484 Mode 1–999 01 – Read Coil 584/984 Mode 1–65535 02 – Read Input Status 484 Mode 1001–1999 10001–19999 (5 digit) or…

• Page 210: Modbus Write To Network (Mwx)

  Chapter 4: System Design and Configuration Modbus Write to Network (MWX) The Modbus Write to Network (MWX) instruction is used to write a block of data from the network masters’s (DL260) memory to Modbus memory addresses within a slave device on the network.

• Page 211: Mwx Slave Memory Address

  Chapter 4: System Design and Configuration MWX Slave Memory Address MWX Slave Address Ranges Function Code Modbus Data Format Slave Address Range(s) 05 – Force Single Coil 484 Mode 1–999 05 – Force Single Coil 584/984 Mode 1–65535 06 – Preset Single Register 484 Mode 4001–4999 40001–49999 (5 digit) or…

• Page 212: Multiple Read And Write Interlocks

  Chapter 4: System Design and Configuration MRX/MWX Example in D D i i r r e e c c t t SOFT DL260 port 2 has two Special Relay contacts associated with it (see Appendix D for comm port special relays). One indicates “Port busy”(SP116), and the other indicates ”Port Communication Error”(SP117).

• Page 213
  Chapter 4: System Design and Configuration If you are using multiple reads and writes in the RLL program, you need to interlock the routines to make sure all the routines are executed. If you don’t use the interlocks, then the CPU will only execute the first routine.

• Page 214: Non-Sequence Protocol (Ascii In/Out And Print)

  Chapter 4: System Design and Configuration Non–Sequence Protocol (ASCII In/Out and PRINT) Configure the DL260 Port 2 for Non-Sequence Configuring port 2 on the DL260 for Non–Sequence allows the CPU to use port 2 to either read or write raw ASCII strings using the ASCII instructions. See the ASCII In/Out instructions and the PRINT instruction in chapter 5.

• Page 215: Rs-485 Network

  Chapter 4: System Design and Configuration • XON/XOFF Flow Control: When this function is enabled, the PLC will send data (PRINT command) until it receives a XOFF (0x13) Pause transmission command. It will continue to wait until it then sees a XON (0x11) Resume transmission command. This selection is only available when the «Non-Sequence(ASCII)»…

• Page 216: Configure The Dl250-1 Port 2 For Non-Sequence

  Chapter 4: System Design and Configuration Configure the DL250-1 Port 2 for Non-Sequence Configuring port 2 on the DL250–1 for Non–Sequence enables the CPU to use the PRINT instruction to print embedded text or text/data variable message from port 2. See the PRINT instruction in chapter 5.

• Page 217: Rs-422 Network

  Chapter 4: System Design and Configuration RS–422 Network RS–422 signals are for long distances (1000 meters max.). Use termination resistors at both ends of RS–422 network wiring, matching the impedance rating of the cable (between 100 and 500 ohms). NOTE: For RS–422 cabling, we recommend AutomationDirect L19853 (Belden 8103) or equivalent. RXD+ RXD–…

• Page 218
  H PTER H PTER H PTER NTELLIGENT NSTRUCTIONS In This Chapter: Introduction ……… . .5–2 Using Boolean Instructions .

• Page 219: Introduction

  Chapter 5: Standard RLL Instructions Introduction The DL205 CPUs offer a wide variety of instructions to perform many different types of operations. There are several instructions that are not available in all of the CPUs. This chapter shows you how to use these individual instructions. There are two ways to quickly find the instruction you need.

• Page 220
  Chapter 5: Standard RLL Instructions Instruction Page Instruction Page FAULT Fault 5-197 NJMP Not Jump (Stage) 7–24 FDGT Find Greater Than 5-152 No Operation 5-177 FILL Fill 5–150 5–19 FIND Find 5–151 5–12, 5–31, 5–75 FINDB Find Block 5–173 OR OUT Or Out 5–19 For/Next…
• Page 221
  Chapter 5: Standard RLL Instructions Instruction Page Instruction Page Subroutine Return 5–182 Subtract 5–91 Subroutine Return Conditional 5–182 SUBB Subtract Binary 5–103 RTOB Real to Binary 5–135 SUBBD Subtract Binary Double 5–104 Read from Network 5–193 SUBBS Subtract Binary Top of Stack 5–118 Subroutine (Goto Subroutine) 5–182…

• Page 222: Using Boolean Instructions

  Chapter 5: Standard RLL Instructions — Boolean Using Boolean Instructions Do you ever wonder why so many PLC manufacturers always quote the scan time for a 1K boolean program? Simple. Most all programs utilize many boolean instructions. These are typically very simple instructions designed to join input and output contacts in various series and parallel combinations.

• Page 223: Normally Closed Contact

  Chapter 5: Standard RLL Instructions — Boolean Normally Closed Contact Normally closed contacts are also very common. This is accomplished with the Store Not, or STRN instruction. The following example shows a simple rung with a normally closed contact. DirectSOFT Example Handheld Mnemonics STRN X0 OUT Y0…

• Page 224: Parallel Elements

  Chapter 5: Standard RLL Instructions — Boolean Parallel Elements You may also have to join contacts in parallel. The OR instruction allows you to do this. The following example shows two contacts in parallel and a single output coil. The instructions would be STR X0, OR X1, followed by OUT Y0.

• Page 225: Comparative Boolean

  Chapter 5: Standard RLL Instructions — Boolean Comparative Boolean Some PLC manufacturers make it really difficult to do a simple comparison of two numbers. Some of them require you to move the data all over the place before you can actually perform the comparison.

• Page 226: Immediate Boolean

  Chapter 5: Standard RLL Instructions — Boolean Immediate Boolean The DL205 Micro PLCs can usually complete an operation cycle in a matter of milliseconds. However, in some applications you may not be able to wait a few milliseconds until the next I/O update occurs.

• Page 227: Boolean Instructions

  Chapter 5: Standard RLL Instructions — Boolean Boolean Instructions Store (STR) The Store instruction begins a new rung or an Aaaa additional branch in a rung with a normally open contact. Status of the contact will be the same state as 250-1 the associated image register point or memory location.

• Page 228
  Chapter 5: Standard RLL Instructions — Boolean Store Bit-of-Word (STRB) The Store Bit-of-Word instruction begins a new rung or an additional branch in a rung with a normally open Aaaa.bb contact. Status of the contact will be the same state as 250-1 the bit referenced in the associated memory location.
• Page 229
  Chapter 5: Standard RLL Instructions — Boolean Or (OR) The Or instruction logically ors a normally open contact in parallel with another contact in a rung. The Aaaa status of the contact will be the same state as the 250-1 associated image register point or memory location.
• Page 230
  Chapter 5: Standard RLL Instructions — Boolean Or Bit-of-Word (ORB) The Or Bit-of-Word instruction logically ors a normally open Bit-of-Word contact in parallel with Aaaa.bb another contact in a rung. Status of the contact will be 250-1 the same state as the bit referenced in the associated memory location.
• Page 231
  Chapter 5: Standard RLL Instructions — Boolean And (AND) The And instruction logically ands a normally open Aaaa contact in series with another contact in a rung. The status of the contact will be the same state as the 250-1 associated image register point or memory location.
• Page 232
  Chapter 5: Standard RLL Instructions — Boolean AND Bit-of-Word (ANDB) The And Bit-of-Word instruction logically ands a Aaaa.bb normally open contact in series with another contact in a rung. The status of the contact will be the same state 250-1 as the bit referenced in the associated memory location.
• Page 233
  Chapter 5: Standard RLL Instructions — Boolean And Store (ANDSTR) The And Store instruction logically ands two branches of a rung in series. Both branches must begin with the Store instruction. 250-1 In the following And Store example, the branch consisting of contacts X2, X3, and X4 have been anded with the branch consisting of contact X1.
• Page 234
  Chapter 5: Standard RLL — Boolean Out (OUT) The Out instruction reflects the status of the rung (on/off ) and outputs the discrete (on/off ) state to the specified image register point or memory Aaaa 250-1 location. Multiple Out instructions referencing the same discrete location should not be used since only the last Out instruction in the program will control the physical output point.
• Page 235
  Chapter 5: Standard RLL Instructions — Boolean Out Bit-of-Word (OUTB) The Out Bit-of-Word instruction reflects the status of the rung (on/off ) and outputs the discrete (on/off ) state Aaaa.bb to the specified bit in the referenced memory location. Multiple Out Bit-of-Word instructions referencing the 250-1 same bit of the same word generally should not be used since only the last Out instruction in the program will…
• Page 236
  Chapter 5: Standard RLL Instructions — Boolean Or Out (OROUT) The Or Out instruction allows more than one rung of discrete A aaa logic to control a single output. Multiple Or Out instructions OR OUT referencing the same output coil may be used, since all 250-1 contacts controlling the output are logically ORed together.
• Page 237
  Chapter 5: Standard RLL Instructions — Boolean Positive Differential (PD) The Positive Differential instruction is typically A aaa known as a one shot. When the input logic produces an off to on transition, the output will 250-1 energize for one CPU scan. Operand Data Type DL230 Range DL240 Range DL250-1 Range DL260 Range Inputs…
• Page 238
  Chapter 5: Standard RLL Instructions — Boolean Store Positive Differential (STRPD) The Store Positive Differential instruction begins a Aaaa new rung or an additional branch in a rung with a contact. The contact closes for one CPU scan when 250-1 the state of the associated image register point makes an Off-to-On transition.
• Page 239
  Chapter 5: Standard RLL Instructions — Boolean Or Positive Differential (ORPD) The Or Positive Differential instruction logically ORs a Aaaa contact in parallel with another contact in a rung. The status of the contact will be open until the associated image register point makes an Off-to-On transition, closing it for one CPU 250-1 scan.
• Page 240
  Chapter 5: Standard RLL Instructions — Boolean And Positive Differential (ANDPD) The And Positive Differential instruction logically Aaaa ANDs a normally open contact in series with another contact in a rung. The status of the contact will be open until the associated image register point makes an Off- 250-1 to-On transition, closing it for one CPU scan.
• Page 241
  Chapter 5: Standard RLL Instructions — Boolean Set (SET) Optional The Set instruction sets or turns on an image register memory range point/memory location or a consecutive range of image A aaa register points/memory locations. Once the point/location is set it will remain on until it is reset 250-1 using the Reset instruction.
• Page 242
  Chapter 5: Standard RLL Instructions — Boolean Set Bit-of-Word (SETB) Aaaa.bb The Set Bit-of-Word instruction sets or turns on a bit in a V-memory location. Once the bit is set it will remain on until it is reset using the Reset Bit-of-Word instruction. It is not necessary for the input 250-1 controlling the Set Bit-of-Word instruction to remain on.
• Page 243
  Chapter 5: Standard RLL Instructions — Boolean Pause (PAUSE) The Pause instruction disables the output update on a range of outputs. The ladder program will continue to run and update the image register. However, the outputs PAUSE 250-1 in the range specified in the Pause instruction will be turned off at the output points.

• Page 244: Comparative Boolean

  Chapter 5: Standard RLL Instructions — Boolean Comparative Boolean Store If Equal (STRE) A aaa B bbb The Store If Equal instruction begins a new rung or additional branch in a rung with a normally open comparative contact. The contact will be on when Vaaa 250-1 equals Bbbb .

• Page 245
  Chapter 5: Standard RLL Instructions — Boolean Or If Equal (ORE) The Or If Equal instruction connects a normally open comparative contact in parallel with another contact. A aaa B bbb The contact will be on when Vaaa equals Bbbb. 250-1 Or If Not Equal (ORNE) The Or If Not Equal instruction connects a normally…
• Page 246
  Chapter 5: Standard RLL Instructions — Boolean And If Equal (ANDE) A aaa B bbb The And If Equal instruction connects a normally open comparative contact in series with another contact. The contact will be on when Vaaa equals 250-1 Bbbb.
• Page 247
  Chapter 5: Standard RLL Instructions — Boolean Store (STR) A aaa B bbb The Comparative Store instruction begins a new rung or additional branch in a rung with a normally open comparative contact. The contact will be on when Aaaa is equal to or greater 250-1 than Bbbb.
• Page 248
  Chapter 5: Standard RLL Instructions — Boolean Or (OR) The Comparative Or instruction connects a normally open comparative contact in parallel with another contact. A aaa B bbb The contact will be on when Aaaa is equal to or greater 250-1 than Bbbb.
• Page 249
  Chapter 5: Standard RLL Instructions — Boolean And (AND) A aaa B bbb The Comparative And instruction connects a normally open comparative contact in series with another contact. The contact will be on when Aaaa is equal to 250-1 or greater than Bbbb. And Not (ANDN) The Comparative And Not instruction connects a A aaa…

• Page 250: Immediate Instructions

  Chapter 5: Standard RLL Instructions — Immediate Immediate Instructions Store Immediate (STRI) The Store Immediate instruction begins a new rung or additional branch in a rung. The status of the contact will be the same as the status of the 250-1 associated input point at the time the instruction is executed.

• Page 251
  Chapter 5: Standard RLL Instructions — Immediate Or Immediate (ORI) The Or Immediate connects two contacts in parallel. The status of the contact will be the same as the status of the associated input point at the time the instruction is executed. 250-1 The image register is not updated.
• Page 252
  Chapter 5: Standard RLL Instructions — Immediate And Immediate (ANDI) The And Immediate connects two contacts in series. The status of the contact will be the same as the status of the associated input point at the time the instruction is executed. 250-1 The image register is not updated.
• Page 253
  Chapter 5: Standard RLL Instructions — Immediate Out Immediate (OUTI) The Out Immediate instruction reflects the status of the rung (on/off ) and outputs the discrete (on/off ) status to Y aaa the specified module output point and the image register OUTI 250-1 at the time the instruction is executed.
• Page 254
  Chapter 5: Standard RLL Instructions — Immediate Out Immediate Formatted (OUTIF) The Out Immediate Formatted instruction outputs a 1 to 32 OUTIF Y aaa bit binary value from the accumulator to specified output points at the time the instruction is executed. Accumulator bits 250-1 that are not used by the instruction are set to zero.
• Page 255
  Chapter 5: Standard RLL Instructions — Immediate Set Immediate (SETI) The Set Immediate instruction immediately sets, or turns on an output or a range of outputs in the image register and the corresponding output point(s) at the Y aaa 250-1 time the instruction is executed.
• Page 256
  Chapter 5: Standard RLL Instructions — Immediate Load Immediate (LDI) The Load Immediate instruction loads a 16-bit V-memory value into the accumulator. The valid address range includes all V aaa input point addresses on the local base. The value reflects the current status of the input points at the time the instruction is 250-1 executed.
• Page 257
  Chapter 5: Standard RLL Instructions — Immediate Load Immediate Formatted (LDIF) The Load Immediate Formatted instruction loads a 1–32 bit binary LDIF X aaa value into the accumulator. The value reflects the current status of K bbb the input module(s) at the time the instruction is executed. 250-1 Accumulator bits that are not used by the instruction are set to zero.

• Page 258: Timer, Counter And Shift Register Instructions

  Chapter 5: Standard RLL Instructions — Timer, Counter and Shift Register Timer, Counter and Shift Register Instructions Using Timers Timers are used to time an event for a desired length of time. The single input timer will time as long as the input is on. When the input changes from on to off the timer current value is reset to 0.

• Page 259
  Chapter 5: Standard RLL Instructions — Timer, Counter and Shift Register Timer (TMR) and Timer Fast (TMRF) The Timer instruction is a 0.1 second single-input timer that times to a maximum of 999.9 seconds. The Timer Fast B bbb instruction is a 0.01 second single input timer that times up to a maximum of 99.99 seconds.

• Page 260: Timer Example Using Discrete Status Bits

  Chapter 5: Standard RLL Instructions — Timer, Counter and Shift Register Timer Example Using Discrete Status Bits In the following example, a single-input timer is used with a preset of 3 seconds. The timer discrete status bit (T2) will turn on when the timer has timed for 3 seconds. The timer is reset when X1 turns off, turning the discrete status bit off and resetting the timer current value to 0.

• Page 261: Accumulating Timer (Tmra)

  Chapter 5: Standard RLL Instructions — Timer, Counter and Shift Register Accumulating Timer (TMRA) Enable T aaa TMRA The Accumulating Timer is a 0.1 second two-input timer that will B bbb time to a maximum of 9999999.9. The TMRA uses two timer Reset registers in V-memory.

• Page 262: Accumulating Timer Example Using Discrete Status Bits

  Chapter 5: Standard RLL Instructions — Timer, Counter and Shift Register Accumulating Timer Example using Discrete Status Bits In the following example, a two input timer (accumulating timer) is used with a preset of 3 seconds. The timer discrete status bit (T6) will turn on when the timer has timed for 3 seconds.

• Page 263
  Chapter 5: Standard RLL Instructions — Timer, Counter and Shift Register Counter (CNT) Counter # The Counter is a two-input counter that increments when the count input logic transitions from off to on. Count CT aaa When the counter reset input is on the counter resets B bbb to 0.

• Page 264: Counter Example Using Discrete Status Bits

  Chapter 5: Standard RLL Instructions — Timer, Counter and Shift Register Counter Example Using Discrete Status Bits In the following example, when X1 makes an off to on transition, counter CT2 will increment by one. When the current value reaches the preset value of 3, the counter status bit CT2 will turn on and energize Y7.

• Page 265
  Chapter 5: Standard RLL Instructions — Timer, Counter and Shift Register Stage Counter (SGCNT) The Stage Counter is a single-input counter that Counter # increments when the input logic transitions from off to on. This counter differs from other counters since it will CT aaa SGCNT hold its current value until reset using the RST…

• Page 266: Stage Counter Example Using Discrete Status Bits

  Chapter 5: Standard RLL Instructions — Timer, Counter and Shift Register Stage Counter Example Using Discrete Status Bits In the following example, when X1 makes an off to on transition, stage counter CT7 will increment by one. When the current value reaches 3, the counter status bit CT7 will turn on and energize Y7.

• Page 267
  Chapter 5: Standard RLL Instructions — Timer, Counter and Shift Register Up Down Counter (UDC) CT aaa This Up/Down Counter counts up on each off to on B bbb transition of the Up input and counts down on each Down off to on transition of the Down input.

• Page 268: Up/Down Counter Example Using Discrete Status Bits

  Chapter 5: Standard RLL Instructions — Timer, Counter and Shift Register Up/Down Counter Example Using Discrete Status Bits In the following example, if X2 and X3 are off, when X1 toggles from off to on the counter will increment by one. If X1 and X3 are off the counter will decrement by one when X2 toggles from off to on.

• Page 269
  Chapter 5: Standard RLL Instructions — Timer, Counter and Shift Register Shift Register (SR) The Shift Register instruction shifts data through a DATA predefined number of control relays. The control ranges in the shift register block must start at the beginning of an 8 From A 250-1 bit boundary and use 8-bit blocks.

• Page 270: Accumulator/Stack Load And Output Data Instructions

  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Accumulator/Stack Load and Output Data Instructions Using the Accumulator The accumulator in the DL205 series CPUs is a 32-bit register which is used as a temporary storage location for data that is being copied or manipulated in some manner. For example, you have to use the accumulator to perform math operations, such as, add, subtract, multiply, etc..

• Page 271
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Using the Accumulator Stack The accumulator stack is used for instructions that require more than one parameter to execute a function or for user defined functionality. The accumulator stack is used when more than one Load instruction is executed without the use of an Out instruction.
• Page 272
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Previous Acc. value Acc. Accumulator Stack Current Acc. value POP the 1st value on the stack into the accumulator and move stack values Acc. 0 Level 1 up one location Level 2 Level 3 Level 4…
• Page 273
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Changing the Accumulator Data Instructions that manipulate data also use the accumulator. The result of the manipulated data resides in the accumulator. The data that was being manipulated is cleared from the accumulator.
• Page 274
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Using Pointers Many of the DL205 series instructions will allow V-memory pointers as a operand. Pointers can be useful in ladder logic programming, but can be difficult to understand or implement in your application if you do not have prior experience with pointers (commonly known as indirect addressing).
• Page 275
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Load (LD) The Load instruction is a 16-bit instruction that loads the value (Aaaa), which is either a V-memory location or a 4-digit A aaa constant, into the lower 16 bits of the accumulator. The upper 250-1 16 bits of the accumulator are set to 0.
• Page 276
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Load Double (LDD) The Load Double instruction is a 32-bit instruction that loads the value (Aaaa), which is either two consecutive V-memory A aaa locations or an 8-digit constant value, into the accumulator. 250-1 Operand Data DL230 Range…
• Page 277
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Load Formatted (LDF) The Load Formatted instruction loads 1 to 32 A aaa consecutive bits from discrete memory locations into the accumulator. The instruction requires a starting location 250-1 (Aaaa) and the number of bits (Kbbb) to be loaded.
• Page 278
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Load Address (LDA) The Load Address instruction is a 16-bit instruction. It converts any octal value or address to O aaa the HEX equivalent value and loads the HEX value 250-1 into the accumulator.
• Page 279
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Load Accumulator Indexed (LDX) Load Accumulator Indexed is a 16-bit instruction that specifies a source address (V-memory) which will be offset by the value A aaa in the first stack location. This instruction interprets the value 250-1 in the first stack location as HEX.
• Page 280
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Load Accumulator Indexed from Data Constants (LDSX) LDSX The Load Accumulator Indexed from Data Constants is a K aaa 16-bit instruction. The instruction specifies a Data Label Area (DLBL) where numerical or ASCII constants are stored. 250-1 This value will be loaded into the lower 16 bits.
• Page 281
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Handheld Programmer Keystrokes SHFT SHFT ANDST SHFT ANDST SHFT SHFT SHFT ANDST ANDST SHFT INST# SHFT INST# SHFT INST# Load Real Number (LDR) The Load Real Number instruction loads a real number A aaa contained in two consecutive V-memory locations, or an 8- digit constant into the accumulator.
• Page 282
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Out (OUT) The Out instruction is a 16-bit instruction that copies the value in the lower 16 bits of the accumulator to a A aaa specified V-memory location (Aaaa). 250-1 Operand Data Type DL230 Range…
• Page 283
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Out Double (OUTD) The Out Double instruction is a 32-bit instruction that OUTD copies the value in the accumulator to two consecutive A aaa V-memory locations at a specified starting location 250-1 (Aaaa).
• Page 284
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Out Formatted (OUTF) The Out Formatted instruction outputs 1 to 32 bits OUTF A aaa from the accumulator to the specified discrete memory locations. The instruction requires a starting location 250-1 (Aaaa) for the destination and the number of bits (Kbbb) to be output.
• Page 285
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Out Indexed (OUTX) The Out Indexed instruction is a 16-bit instruction. It O UT X copies a 16-bit or 4-digit value from the first level of the accumulator stack to a source address offset by the value in the accumulator(V-memory + offset).This instruction 250-1 interprets the offset value as a HEX number.
• Page 286
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Out Least (OUTL) The Out Least instruction copies the value in the lower eight O UT L bits of the accumulator to the lower eight bits of the specified A aaa V-memory location (i.e., it copies the low byte of the low word of the accumulator).
• Page 287
  Chapter 5: Standard RLL Instructions — Accumulator/Stack Load and Output Data Pop (POP) The Pop instruction moves the value from the first level of the accumulator stack (32 bits) to the accumulator and shifts each value in the stack up one level. In the 250-1 example below, when C0 is on, the value 4545 that was on top of the stack is moved into the accumulator using the Pop instruction The value is…

• Page 288: Logical Instructions (Accumulator)

  Chapter 5: Standard RLL Instructions — Logical Logical Instructions (Accumulator) And (AND) The And instruction is a 16-bit instruction that logically ANDs A aaa the value in the lower 16 bits of the accumulator with a specified V-memory location (Aaaa). The result resides in the 250-1 accumulator.

• Page 289
  Chapter 5: Standard RLL Instructions — Logical And Double (ANDD) The And Double is a 32-bit instruction that logically ANDs the value in the accumulator with ANDD two consecutive V-memory locations or an 8-digit A aaa 250-1 (max.) constant value (Aaaa). The result resides in the accumulator.
• Page 290
  Chapter 5: Standard RLL Instructions — Logical And Formatted (ANDF) The And Formatted instruction logically ANDs the binary value in ANDF A aaa the accumulator and a specified range of discrete memory bits (1 to 32). The instruction requires a starting location (Aaaa) and number 250-1 of bits (Kbbb) to be ANDed.
• Page 291
  Chapter 5: Standard RLL Instructions — Logical And with Stack (ANDS) The And with Stack instruction is a 32-bit instruction that ANDS logically ANDs the value in the accumulator with the first level of the accumulator stack. The result resides in the accumulator. The value in the first level of the accumulator stack is removed 250-1 from the stack and all values are moved up one level.
• Page 292
  Chapter 5: Standard RLL Instructions — Logical Or (OR) The Or instruction is a 16-bit instruction that logically ORs the value in the lower 16 bits of the accumulator with a specified V-memory location (Aaaa). The result resides in A aaa 250-1 the accumulator.
• Page 293
  Chapter 5: Standard RLL Instructions — Logical Or Double (ORD) The Or Double is a 32-bit instruction that ORs the value in the accumulator with the value (Aaaa) or an 8-digit (max.) A aaa constant value. The result resides in the accumulator. Discrete status flags indicate if the result of the Or Double is 250-1 zero or a negative number (the most significant bit is on).
• Page 294
  Chapter 5: Standard RLL Instructions — Logical Or Formatted (ORF) The Or Formatted instruction logically ORs the binary value A aaa in the accumulator and a specified range of discrete bits (1 to 32). The instruction requires a starting location (Aaaa) and 250-1 the number of bits (Kbbb) to be ORed.
• Page 295
  Chapter 5: Standard RLL Instructions — Logical Or with Stack (ORS) The Or with Stack instruction is a 32-bit instruction that logically ORs the value in the accumulator with the first level O R S of the accumulator stack. The result resides in the accumulator.
• Page 296
  Chapter 5: Standard RLL Instructions — Logical Exclusive Or (XOR) The Exclusive Or instruction is a 16-bit instruction that performs an exclusive OR of the value in the lower 16 bits of the accumulator and a specified V-memory location (Aaaa). The A aaa 250-1 result resides in the accumulator.
• Page 297
  Chapter 5: Standard RLL Instructions — Logical Exclusive Or Double (XORD) The Exclusive Or Double is a 32-bit instruction that XORD performs an exclusive OR of the value in the K aaa accumulator and the value (Kaaa), which is an 250-1 8-digit (max.) constant.
• Page 298
  Chapter 5: Standard RLL Instructions — Logical Exclusive OR Formatted (XORF) The Exclusive Or Formatted instruction performs an exclusive OR of the binary value in the accumulator and a specified range of discrete memory bits (1 to 32). XORF A aaa 250-1 The instruction requires a starting location (Aaaa) and the number K bbb…
• Page 299
  Chapter 5: Standard RLL Instructions — Logical Exclusive Or with Stack (XORS) The Exclusive Or with Stack instruction is a 32-bit instruction that performs an Exclusive Or of the value in the accumulator with the first level of the accumulator XO R S stack.
• Page 300
  Chapter 5: Standard RLL Instructions — Logical Compare (CMP) The compare instruction is a 16-bit instruction that compares the value in the lower 16 bits of the accumulator with the value in a specified V-memory location (Aaaa). The corresponding status flag will be A aaa 250-1 turned on indicating the result of the comparison.
• Page 301
  Chapter 5: Standard RLL Instructions — Logical Compare Double (CMPD) The Compare Double instruction is a 32–bit instruction that CMPD compares the value in the accumulator with the value (Aaaa), A aaa which is either two consecutive V-memory locations or an 8–digit 250-1 (max.) constant.
• Page 302
  Chapter 5: Standard RLL Instructions — Logical Compare Formatted (CMPF) The Compare Formatted compares the value in the CMPF A aaa accumulator with a specified number of discrete locations K bbb (1–32). The instruction requires a starting location (Aaaa) 250-1 and the number of bits (Kbbb) to be compared.
• Page 303
  Chapter 5: Standard RLL Instructions — Logical Compare with Stack (CMPS) The Compare with Stack instruction is a 32-bit C MP S instruction that compares the value in the accumulator with the value in the first level of the 250-1 accumulator stack.
• Page 304
  Chapter 5: Standard RLL Instructions — Logical Compare Real Number (CMPR) The Compare Real Number instruction CMPR compares a real number value in the A aaa accumulator with two consecutive V-memory 250-1 locations containing a real number. The corresponding status flag will be turned on indicating the result of the comparison.

• Page 305: Math Instructions

  Chapter 5: Standard RLL Instructions — Math Math Instructions Add (ADD) Add is a 16-bit instruction that adds a BCD value in the accumulator with a BCD value in a V-memory location A aaa (Aaaa). (You cannot use a constant (K) as the BCD value in 250-1 the box.) The result resides in the accumulator.

• Page 306
  Chapter 5: Standard RLL Instructions — Math Add Double (ADDD) Add Double is a 32-bit instruction that adds the BCD value in the accumulator with a BCD value (Aaaa), which ADDD is either two consecutive V-memory locations or an A aaa 250-1 8–digit (max.) BCD constant.
• Page 307
  Chapter 5: Standard RLL Instructions — Math Add Real (ADDR) Add Real is a 32-bit instruction that adds a real number, which is ADDR ADDR either two consecutive V-memory locations or a 32-bit constant, A aaa A aaa to a real number in the accumulator. Both numbers must 250-1 conform to the IEEE floating point format.
• Page 308
  Chapter 5: Standard RLL Instructions — Math Subtract (SUB) Subtract is a 16-bit instruction that subtracts the BCD A aaa value (Aaaa) in a V-memory location from the BCD value in the lower 16 bits of the accumulator. The result resides 250-1 in the accumulator.
• Page 309
  Chapter 5: Standard RLL Instructions — Math Subtract Double (SUBD) Subtract Double is a 32-bit instruction that subtracts the SUBD BCD value (Aaaa), which is either two consecutive V-memory A aaa locations or an 8-digit (max.) constant, from the BCD value 250-1 in the accumulator.
• Page 310
  Chapter 5: Standard RLL Instructions — Math Subtract Real (SUBR) The Subtract Real is a 32-bit instruction that subtracts a real SUBR number, which is either two consecutive V-memory locations or A aaa a 32-bit constant, from a real number in the accumulator. The 250-1 result is a 32-bit real number that resides in the accumulator.
• Page 311
  Chapter 5: Standard RLL Instructions — Math Multiply (MUL) Multiply is a 16-bit instruction that multiplies the BCD A aaa value (Aaaa), which is either a V-memory location or a 4–digit (max.) constant, by the BCD value in the lower 16 250-1 bits of the accumulator The result can be up to 8 digits and resides in the accumulator.
• Page 312
  Chapter 5: Standard RLL Instructions — Math Multiply Double (MULD) Multiply Double is a 32-bit instruction that multiplies the 8- MULD digit BCD value in the accumulator by the 8-digit BCD value A aaa in the two consecutive V-memory locations specified in the 250-1 instruction.
• Page 313
  Chapter 5: Standard RLL Instructions — Math Multiply Real (MULR) The Multiply Real instruction multiplies a real number in MULR the accumulator with either a real constant or a real number A aaa occupying two consecutive V-memory locations. The result 250-1 resides in the accumulator.
• Page 314
  Chapter 5: Standard RLL Instructions — Math Divide (DIV) Divide is a 16-bit instruction that divides the BCD value in the accumulator by a BCD value (Aaaa), which is either a A aaa V-memory location or a 4-digit (max.) constant. The first 250-1 part of the quotient resides in the accumulator and the remainder resides in the first stack location.
• Page 315
  Chapter 5: Standard RLL Instructions — Math Divide Double (DIVD) Divide Double is a 32-bit instruction that divides the BCD DIVD value in the accumulator by a BCD value (Aaaa), which A aaa must be obtained from two consecutive V-memory 250-1 locations.
• Page 316
  Chapter 5: Standard RLL Instructions — Math Divide Real (DIVR) The Divide Real instruction divides a real number in the DIVR accumulator by either a real constant or a real number A aaa occupying two consecutive V-memory locations. The result 250-1 resides in the accumulator.
• Page 317
  Chapter 5: Standard RLL Instructions — Math Increment (INC) The Increment instruction increments a BCD value in a specified V-memory location by “1” each time the instruction A aaa is executed. 250-1 Decrement (DEC) The Decrement instruction decrements a BCD value in a A aaa specified V-memory location by “1”…
• Page 318
  Chapter 5: Standard RLL Instructions — Math Add Binary (ADDB) The Add Binary instruction adds a 16-bit number (Aaaa) to the value stored in the accumulator. The number in the ADDB accumulator can be up to 32 bits long. The source of the A aaa 16-bit operand can be a constant or a data value located in 250-1…
• Page 319
  Chapter 5: Standard RLL Instructions — Math Add Binary Double (ADDBD) Add Binary Double is a 32-bit instruction that adds the binary ADDBD value in the accumulator with the value (Aaaa), which is either A aaa two consecutive V-memory locations or an 8-digit (max.) binary 250-1 constant.
• Page 320
  Chapter 5: Standard RLL Instructions — Math Subtract Binary (SUBB) SUBB The Subtract Binary instruction subtracts a 16-bit number (Aaaa) A aaa from the value stored in the accumulator. The number in the accumulator can be up to 32 bits long. The source of the 16-bit operand can be a constant or 250-1 a data value located in V-memory.
• Page 321
  Chapter 5: Standard RLL Instructions — Math Subtract Binary Double (SUBBD) Subtract Binary Double is a 32-bit instruction that subtracts SUBBD the binary value (Aaaa), which is either two consecutive A aaa V-memory locations or an 8-digit (max.) binary constant, 250-1 from the binary value in the accumulator.
• Page 322
  Chapter 5: Standard RLL Instructions — Math Multiply Binary (MULB) The Multiply Binary instruction multiplies a 16-bit number MULB A(aaa) by the value stored in the accumulator. The number A aaa in the accumulator can be up to 32 bits long. The source of 250-1 the 16-bit operand can be a constant or a data value located in V-memory.
• Page 323
  Chapter 5: Standard RLL Instructions — Math Divide Binary (DIVB) The Divide Binary instruction divides a 16-bit number DIVB (Aaaa) into the value stored in the accumulator. The A aaa number in the accumulator can be up to 32 bits long. The 250-1 source of the 16-bit divisor can be a constant or a data value located in V-memory.
• Page 324
  Chapter 5: Standard RLL Instructions — Math Increment Binary (INCB) The Increment Binary instruction increments a binary value INCB in a specified V-memory location by “1” each time the A aaa instruction is executed. 250-1 Used HPP Used Operand Data Type DL230 Range DL240 Range DL250-1 Range…
• Page 325
  Chapter 5: Standard RLL Instructions — Math Decrement Binary (DECB) The Decrement Binary instruction decrements a binary DECB value in a specified V-memory location by “1” each time the A aaa instruction is executed. 250-1 Used HPP Used Operand Data Type DL230 Range DL240 Range DL250-1 Range…
• Page 326
  Chapter 5: Standard RLL Instructions — Math Add Formatted (ADDF) Add Formatted is a 32-bit instruction that adds the BCD value A aaa ADDF in the accumulator with the BCD value (Aaaa) which is a range K bbb of discrete bits. The specified range (Kbbb) can be 1 to 32 250-1 consecutive bits.
• Page 327
  Chapter 5: Standard RLL Instructions — Math Subtract Formatted (SUBF) Subtract Formatted is a 32-bit instruction that subtracts the SUBF A aaa BCD value (Aaaa), which is a range of discrete bits, from the K bbb BCD value in the accumulator. The specified range (Kbbb) 250-1 can be 1 to 32 consecutive bits.
• Page 328
  Chapter 5: Standard RLL Instructions — Math Multiply Formatted (MULF) Multiply Formatted is a 16-bit instruction that multiplies the A aaa MULF BCD value in the accumulator by the BCD value (Aaaa) K bbb which is a range of discrete bits. The specified range (Kbbb) 250-1 can be 1 to 16 consecutive bits.
• Page 329
  Chapter 5: Standard RLL Instructions — Math Divide Formatted (DIVF) Divide Formatted is a 16-bit instruction that divides the BCD DIVF A aaa value in the accumuator by the BCD value (Aaaa), a range of discrete bits. The specified range (Kbbb) can be 1 to 16 K bbb 250-1 consecutive bits.
• Page 330
  Chapter 5: Standard RLL Instructions — Math Add Top of Stack (ADDS) Add Top of Stack is a 32-bit instruction that adds the BCD ADDS value in the accumulator with the BCD value in the first level of the accumulator stack. The result resides in the 250-1 accumulator.
• Page 331
  Chapter 5: Standard RLL Instructions — Math Subtract Top of Stack (SUBS) Subtract Top of Stack is a 32-bit instruction that subtracts S UBS the BCD value in the first level of the accumulator stack from the BCD value in the accumulator. The result resides in 250-1 the accumulator.
• Page 332
  Chapter 5: Standard RLL Instructions — Math Multiply Top of Stack (MULS) Multiply Top of Stack is a 16-bit instruction that multiplies a MULS 4-digit BCD value in the first level of the accumulator stack by a 4-digit BCD value in the accumulator. The result resides 250-1 in the accumulator.
• Page 333
  Chapter 5: Standard RLL Instructions — Math Divide by Top of Stack (DIVS) Divide Top of Stack is a 32-bit instruction that divides the DIVS 8-digit BCD value in the accumulator by a 4-digit BCD value in the first level of the accumulator stack. The result 250-1 resides in the accumulator and the remainder resides in the first level of the accumulator stack.
• Page 334
  Chapter 5: Standard RLL Instructions — Math Add Binary Top of Stack (ADDBS) Add Binary Top of Stack instruction is a 32-bit ADDBS instruction that adds the binary value in the accumulator with the binary value in the first level of the accumulator 250-1 stack.
• Page 335
  Chapter 5: Standard RLL Instructions — Math Subtract Binary Top of Stack (SUBBS) Subtract Binary Top of Stack is a 32-bit instruction that S UBBS subtracts the binary value in the first level of the accumulator stack from the binary value in the accumulator. The result 250-1 resides in the accumulator.
• Page 336
  Chapter 5: Standard RLL Instructions — Math Multiply Binary Top of Stack (MULBS) Multiply Binary Top of Stack is a 16-bit instruction that MULBS multiplies the 16-bit binary value in the first level of the accumulator stack by the 16-bit binary value in the 250-1 accumulator.
• Page 337
  Chapter 5: Standard RLL Instructions — Math Divide Binary by Top of Stack (DIVBS) Divide Binary Top of Stack is a 32-bit instruction that divides the 32-bit binary value in the accumulator by the 16-bit DIVBS binary value in the first level of the accumulator stack. The result resides in the accumulator and the remainder resides in 250-1 the first level of the accumulator stack.

• Page 338: Transcendental Functions (Dl260 Only)

  Chapter 5: Standard RLL Instructions — Transcendental Functions Transcendental Functions (DL260 only) The DL260 CPU features special numerical functions to complement its real number capability. The transcendental functions include the trigonometric sine, cosine, and tangent, and also their inverses (arc sine, arc cosine, and arc tangent). The square root function is also 250-1 grouped with these other functions.

• Page 339
  Chapter 5: Standard RLL Instructions — Transcendental Functions Arc Cosine Real (ACOSR) The Arc Cosine Real instruction takes the inverse cosine of the ACOSR real number stored in the accumulator. The result resides in the accumulator. Both the original number and the result are in IEEE 32-bit format.

• Page 340: Bit Operation Instructions

  Chapter 5: Standard RLL Instructions — Bit Operation Bit Operation Instructions Sum (SUM) The Sum instruction counts number of bits that are set to “1” in the accumulator. The HEX result resides in the accumulator. 250-1 Math Function Range of Argument SP63 On when the result of the instruction causes the value in the accumulator to be zero.

• Page 341
  Chapter 5: Standard RLL Instructions — Bit Operation Shift Left (SHFL) Shift Left is a 32-bit instruction that shifts the bits in the SHFL accumulator a specified number (Aaaa) of places to the left. A aaa The vacant positions are filled with zeros and the bits shifted 250-1 out of the accumulator are lost.
• Page 342
  Chapter 5: Standard RLL Instructions — Bit Operation Shift Right (SHFR) Shift Right is a 32-bit instruction that shifts the bits in the SHFR accumulator a specified number (Aaaa) of places to the right. A aaa The vacant positions are filled with zeros and the bits shifted 250-1 out of the accumulator are lost.
• Page 343
  Chapter 5: Standard RLL Instructions — Bit Operation Rotate Left (ROTL) Rotate Left is a 32-bit instruction that rotates the bits in the ROTL accumulator a specified number (Aaaa) of places to the left. A aaa 250-1 Operand Data Type DL250-1 Range DL260 Range V-memory…
• Page 344
  Chapter 5: Standard RLL Instructions — Bit Operation Rotate Right (ROTR) Rotate Right is a 32-bit instruction that rotates the bits in the ROTR accumulator a specified number (Aaaa) of places to the right. A aaa 250-1 Operand Data Type DL250-1 Range DL260 Range V-memory…
• Page 345
  Chapter 5: Standard RLL Instructions — Bit Operation Encode (ENCO) The Encode instruction encodes the bit position in the ENCO accumulator having a value of 1, and returns the appropriate binary representation. If the most significant bit is set to 1 (Bit 250-1 31), the Encode instruction would place the value HEX 1F (decimal 31) in the accumulator.
• Page 346
  Chapter 5: Standard RLL Instructions — Bit Operation Decode (DECO) The Decode instruction decodes a 5 bit binary value of 0 to 31 DECO (0 to 1F HEX) in the accumulator by setting the appropriate bit position to a 1. If the accumulator contains the value F 250-1 (HEX), bit 15 will be set in the accumulator.

• Page 347: Number Conversion Instructions (Accumulator)

  Chapter 5: Standard RLL Instructions — Number Conversion Number Conversion Instructions (Accumulator) Binary (BIN) The Binary instruction converts a BCD value in the accumulator to the equivalent binary value. The result resides in the accumulator. 250-1 In the following example, when X1 is on, the value in V2000 and V2001 is loaded into the accumulator using the Load Double instruction.

• Page 348
  Chapter 5: Standard RLL Instructions — Number Conversion Binary Coded Decimal (BCD) The Binary Coded Decimal instruction converts a binary value in the accumulator to the equivalent BCD value. The result resides in the accumulator. 250-1 In the following example, when X1 is on, the binary (HEX) value in V2000 and V2001 is loaded into the accumulator using the Load Double instruction.
• Page 349
  Chapter 5: Standard RLL Instructions — Number Conversion Invert (INV) The Invert instruction inverts or takes the one’s complement of the 32-bit value in the accumulator. The result resides in the accumulator. 250-1 In the following example, when X1 is on, the value in V2000 and V2001 will be loaded into the accumulator using the Load Double instruction.
• Page 350
  Chapter 5: Standard RLL Instructions — Number Conversion Ten’s Complement (BCDCPL) BCDCPL The Ten’s Complement instruction takes the 10’s complement (BCD) of the 8-digit accumulator. The result resides in the accumulator. The calculation for this instruction is : 250-1 100000000 —…
• Page 351
  Chapter 5: Standard RLL Instructions — Number Conversion Binary to Real Conversion (BTOR) The Binary-to-Real instruction converts a binary value in the BTOR accumulator to its equivalent real number (floating point) format. The result resides in the accumulator. Both the binary 250-1 and the real number may use all 32 bits of the accumulator.
• Page 352
  Chapter 5: Standard RLL Instructions — Number Conversion Real to Binary Conversion (RTOB) The Real-to-Binary instruction converts the real number in RTOB the accumulator to a binary value. The result resides in the accumulator. Both the binary and the real number may use all 250-1 32 bits of the accumulator.
• Page 353
  Chapter 5: Standard RLL Instructions — Number Conversion Radian Real Conversion (RADR) The Radian Real Conversion instruction converts the real RADR degree value stored in the accumulator to the equivalent real number in radians. The result resides in the accumulator. 250-1 Degree Real Conversion (DEGR) The Degree Real instruction converts the degree real radian…
• Page 354
  Chapter 5: Standard RLL Instructions — Number Conversion ASCII to HEX (ATH) The ASCII TO HEX instruction converts a table of ASCII values to a specified table of HEX values. ASCII values are two digits and their HEX equivalents are one digit. 250-1 This means an ASCII table of four V-memory locations would only require two V-memory locations for the equivalent HEX table.
• Page 355
  Chapter 5: Standard RLL Instructions — Number Conversion Hexadecimal DirectSOFT Equivalents ASCII TABLE Load the constant value into the lower 16 bits of the accumulator. This value defines the number of V memory locations in the 33 34 ASCII table V1400 Convert octal 1400 to HEX 1234…
• Page 356
  Chapter 5: Standard RLL Instructions — Number Conversion In the following example, when X1 is ON the constant (K2) is loaded into the accumulator using the Load instruction. The starting location for the HEX table (V1500) is loaded into the accumulator using the Load Address instruction. The starting location for the ASCII table (V1400) is specified in the HEX to ASCII instruction.
• Page 357
  Chapter 5: Standard RLL Instructions — Number Conversion Segment (SEG) The BCD / Segment instruction converts a four digit HEX value in the accumulator to seven segment display format. The result resides in the accumulator. 250-1 In the following example, when X1 is on, the value in V1400 is loaded into the lower 16 bits of the accumulator using the Load instruction.
• Page 358
  Chapter 5: Standard RLL Instructions — Number Conversion Gray Code (GRAY) GRAY The Gray code instruction converts a 16-bit gray code value to a BCD value. The BCD conversion requires 10 bits of the accumulator. The upper 22 bits are set to “0”. This instruction 250-1 is designed for use with devices (typically encoders) that use the grey code numbering scheme.
• Page 359
  Chapter 5: Standard RLL Instructions — Number Conversion Shuffle Digits (SFLDGT) The Shuffle Digits instruction shuffles a maximum of 8 digits SFLDGT rearranging them in a specified order. This function requires parameters to be loaded into the first level of the accumulator 250-1 stack and the accumulator with two additional instructions.
• Page 360
  Chapter 5: Standard RLL Instructions — Number Conversion In the following example when X1 is on, The value in the first level of the accumulator stack will be reorganized in the order specified by the value in the accumulator. Example A shows how the shuffle digits works when 0 or 9 –F is not used when specifying the order the digits are to be shuffled.
• Page 361
  Chapter 5: Standard RLL Instructions — Table Table Instructions Move (MOV) The Move instruction moves the values from a V-memory table to another V-memory table the same length. The function parameters are loaded into the first level of the V aaa accumulator stack and the accumulator by two additional 250-1 instructions.
• Page 362
  Chapter 5: Standard RLL Instructions — Table Move Memory Cartridge (MOVMC) Load Label (LDLBL) The Move Memory Cartridge instruction is used to copy data MOVMC between V-memory and program ladder memory. The Load V aaa Label instruction is only used with the MOVMC instruction when copying data from program ladder memory to V-memory.
• Page 363
  Chapter 5: Standard RLL Instructions — Table Copy Data From a Data Label Area to V-Memory In the following example, data is copied from a Data Label Area to V-memory. When X1 is on, the constant value (K4) is loaded into the accumulator using the Load instruction. This value specifies the length of the table and is placed in the second stack location after the next Load and Load Label (LDLBL) instructions are executed.
• Page 364
  Chapter 5: Standard RLL Instructions — Table Copy Data From V-Memory to a Data Label Area In the following example, data is copied from V-memory to a data label area. When X1 is on, the constant value (K4) is loaded into the accumulator using the Load instruction. This value specifies the length of the table and is placed in the second stack location after the next Load and Load Address instructions are executed.
• Page 365
  Chapter 5: Standard RLL Instructions — Table Set Bit (SETBIT) SETBIT The Set Bit instruction sets a single bit to one within a range of V-memory locations. V aaa 250-1 Reset Bit (RSTBIT) The Reset Bit instruction resets a single bit to zero within a RSTBIT range of V-memory locations.
• Page 366
  Chapter 5: Standard RLL Instructions — Table For example, supppose we have a table starting at V3000 V3000 that is two words long, as shown to the right. Each word in the table contains 16 bits, or 0 to 17 in octal. To set bit 16 bits 12 in the second word, we use its octal reference (bit 14).
• Page 367
  Chapter 5: Standard RLL Instructions — Table Fill (FILL) The Fill instruction fills a table of up to 255 V-memory FILL locations with a value (Aaaa), which is either a V-memory A aaa location or a 4-digit constant. The function parameters are loaded into the first level of the accumulator stack and the 250-1 accumulator by two additional instructions.
• Page 368
  Chapter 5: Standard RLL Instructions — Table Find (FIND) The Find instruction is used to search for a specified value in a FIND V-memory table of up to 255 locations. The function A aaa parameters are loaded into the first and second levels of the 250-1 accumulator stack and the accumulator by three additional instructions.
• Page 369
  Chapter 5: Standard RLL Instructions — Table DirectSOFT Table length V1400 Offset V1401 Load the constant value 6 Begin here V1402 (HEX) into the lower 16 bits Accumulator of the accumulator V1403 V1404 V1404 contains the location V1405 O 1400 where the match was found.
• Page 370
  Chapter 5: Standard RLL Instructions — Table Operand Data Type DL260 Range V-memory V All (See page 3 — 56) Constant K 0-FFFF Discrete Bit Flags Description SP53 On if there is no value in the table that is equal to the search value. NOTE: Status flags are only valid until another instruction that uses the same flags is executed.
• Page 371
  Chapter 5: Standard RLL Instructions — Table Table to Destination (TTD) The Table To Destination instruction moves a value from a V-memory table to a V-memory location and increments the table pointer by 1. The first V-memory location in the table 250-1 contains the table pointer which indicates the next location in the table to be moved.
• Page 372
  Chapter 5: Standard RLL Instructions — Table In the following example, when X1 is on, the constant value (K6) is loaded into the accumulator using the Load instruction. This value specifies the length of the table and is placed in the first stack location after the Load Address instruction is executed. The octal address 1400 (V1400) is the starting location for the source table and is loaded into the accumulator.
• Page 373
  Chapter 5: Standard RLL Instructions — Table The following diagram shows the scan-by-scan results of the execution for our example program. Notice how the pointer automatically cycles from 0 to 6, and then starts over at 1 instead of 0. Also, notice how SP56 is only on until the end of the scan. Scan N Before TTD Execution After TTD Execution…
• Page 374
  Chapter 5: Standard RLL Instructions — Table Remove from Bottom (RFB) The Remove From Bottom instruction moves a value from the bottom of a V-memory table to a V-memory location and decrements a table pointer by 1. The first V-memory location in the table contains the table pointer which indicates the next 250-1 location in the table to be moved.
• Page 375
  Chapter 5: Standard RLL Instructions — Table In the following example, when X1 is on, the constant value (K6) is loaded into the accumulator using the Load instruction. This value specifies the length of the table and is placed in the first stack location after the Load Address instruction is executed. The octal address 1400 (V1400) is the starting location for the source table and is loaded into the accumulator.
• Page 376
  Chapter 5: Standard RLL Instructions — Table The following diagram shows the scan-by-scan results of the execution for our example program. Notice how the pointer automatically decrements from 6 to 0. Also, notice how SP56 is only on until the end of the scan. Example of Execution Scan N Before RFB Execution…
• Page 377
  Chapter 5: Standard RLL Instructions — Table Source to Table (STT) The Source To Table instruction moves a value from a ST T V-memory location into a V-memory table and increments a table pointer by 1. When the table pointer reaches the end of 250-1 the table, it resets to 1.
• Page 378
  Chapter 5: Standard RLL Instructions — Table In the following example, when X1 is on, the constant value (K6) is loaded into the accumulator using the Load instruction. This value specifies the length of the table and is placed in the first stack location after the Load Address instruction is executed. The octal address 1400 (V1400), which is the starting location for the destination table and table pointer, is loaded into the accumulator.
• Page 379
  Chapter 5: Standard RLL Instructions — Table The following diagram shows the scan-by-scan results of the execution for our example program. Notice how the pointer automatically cycles from 0 to 6, and then starts over at 1 instead of 0. Also, notice how SP56 is affected by the execution. Although our example does not show it, we are assuming that there is another part of the program that changes the value in V1500 (data source) prior to the execution of the STT instruction.
• Page 380
  Chapter 5: Standard RLL Instructions — Table Remove from Table (RFT) The Remove From Table instruction pops a value off of a table R F T and stores it in a V-memory location. When a value is removed from the table all other values are shifted up 1 location. The 250-1 first V-memory location in the table contains the table length counter.
• Page 381
  Chapter 5: Standard RLL Instructions — Table In the following example, when X1 is on, the constant value (K6) is loaded into the accumulator using the Load instruction. This value specifies the length of the table and is placed in the first stack location after the Load Address instruction is executed. The octal address 1400 (V1400) is the starting location for the source table and is loaded into the accumulator.
• Page 382
  Chapter 5: Standard RLL Instructions — Table The following diagram shows the scan-by-scan results of the execution for our example program. In our example we’re showing the table counter set to 4 initially. (Remember, you can set the table counter to any value that is within the range of the table.) The table counter automatically decrements from 4 to 0 as the instruction is executed.
• Page 383
  Chapter 5: Standard RLL Instructions — Table Add to Top (ATT) The Add To Top instruction pushes a value onto a V-memory table from a V-memory location. When the value is added to V aaa the table all other values are pushed down 1 location. 250-1 The instruction will be executed once per scan provided the input remains on.
• Page 384
  Chapter 5: Standard RLL Instructions- Table In the following example, when X1 is on, the constant value (K6) is loaded into the accumulator using the Load instruction. This value specifies the length of the table and is placed in the first stack location after the Load Address instruction is executed. The octal address 1400 (V1400), which is the starting location for the destination table and table counter, is loaded into the accumulator.
• Page 385
  Chapter 5: Standard RLL Instructions — Table The following diagram shows the scan-by-scan results of the execution for our example program. The table counter is set to 2 initially, and it will automatically increment from 2 to 6 as the instruction is executed. Notice how SP56 comes on when the table counter is 6, which is equal to the table length.
• Page 386
  Chapter 5: Standard RLL Instructions — Table Table Shift Left (TSHFL) The Table Shift Left instruction shifts all the bits in a V-memory TSHFL table to the left a specified number of bit positions. Vaaa 250-1 Table Shift Right (TSHFR) TSHFR The Table Shift Right instruction shifts all the bits in a V-memory Vaaa…
• Page 387
  Chapter 5: Standard RLL Instructions — Table Discrete Bit Flags Description On when the number of bits to be shifted is larger than the total bits contained within the SP53 table. SP67 On when the last bit shifted (just before it is discarded) is a “1”. NOTE: Status flags are only valid until: —…
• Page 388
  Chapter 5: Standard RLL Instructions — Table AND Move (ANDMOV) ANDMOV The AND Move instruction copies data from a table to the specified memory location, ANDing each word with the Vaaa accumulator data as it is written. 250-1 ORMOV Vaaa OR Move (ORMOV) The Or Move instruction copies data from a table to the specified memory location, ORing each word with the…
• Page 389
  Chapter 5: Standard RLL Instructions — Table DirectSOFT Handheld Programmer Keystrokes Load the constant value 2 SHFT PREV (Hex.) into the lower 16 ANDST bits of the accumulator. SHFT ANDST 0 3000 SHFT PREV ANDST Convert otal 3000 to HEX SHFT and load the value into the ORST…
• Page 390
  Chapter 5: Standard RLL Instructions — Table Find Block (FINDB) The Find Block instruction searches for an occurrence of a FINDB specified block of values in a V-memory table. The function Aaaa parameters are loaded into the first and second levels of the 250-1 accumulator stack and the accumulator by three additional instructions.
• Page 391
  Chapter 5: Standard RLL Instructions — Table Swap (SWAP) The Swap instruction exchanges the data in two tables of equal SWAP length. V aaa 250-1 The following description applies to both the Set Bit and Reset Bit table instructions. Step 1: Load the length of the tables (number of V-memory locations) into the first level of the Used accumulator stack.

• Page 392: Clock/Calendar Instructions

  Chapter 5: Standard RLL Instructions — Clock/Calendar Clock/Calendar Instructions Date (DATE) The Date instruction can be used to set the date in the CPU. DATE The instruction requires two consecutive V-memory locations V aaa (Vaaa) to set the date. If the values in the specified locations are not valid, the date will not be set.

• Page 393
  Chapter 5: Standard RLL Instructions — Clock/Calendar Time (TIME) The Time instruction can be used to set the time (24-hour TIME clock) in the CPU. The instruction requires two consecutive V aaa V-memory locations (Vaaa) which are used to set the time. If 250-1 the values in the specified locations are not valid, the time will not be set.

• Page 394: Cpu Control Instructions

  Chapter 5: Standard RLL Instructions — CPU Control CPU Control Instructions No Operation (NOP) The No Operation is an empty (not programmed) memory location. 250-1 Handheld Programmer Keystrokes DirectSOFT SHFT INST# Used HPP Used End (END) The End instruction marks the termination point of the normal program scan.

• Page 395
  Chapter 5: Standard RLL Instructions — CPU Control Reset Watch Dog Timer (RSTWT) The Reset Watch Dog Timer instruction resets the CPU scan timer. The default setting for the watch dog timer is 200ms. RSTWT Scan times very seldom exceed 200ms, but it is possible. For/next loops, subroutines, interrupt routines, and table 250-1 instructions can be programmed such that the scan becomes…

• Page 396: Program Control Instructions

  Chapter 5: Standard RLL Instructions — Program Control Program Control Instructions Goto Label (GOTO) (LBL) The Goto / Label skips all instructions between the Goto K aaa and the corresponding LBL instruction. The operand GOTO value for the Goto and the corresponding LBL instruction are the same.

• Page 397
  Chapter 5: Standard RLL Instructions — Program Control For/Next (FOR) (NEXT) The For and Next instructions are used to execute a A aaa section of ladder logic between the For and Next instruction a specified numbers of times. When the For 250-1 instruction is enabled, the program will loop the specified number of times.
• Page 398
  Chapter 5: Standard RLL Instructions — Program Control In the following example, when X1 is on, the application program inside the For/Next loop will be executed three times. If X1 is off the program inside the loop will not be executed. The immediate instructions may or may not be necessary depending on your application.
• Page 399
  Chapter 5: Standard RLL Instructions — Program Control Goto Subroutine (GTS) (SBR) The Goto Subroutine instruction allows a section of K aaa ladder logic to be placed outside the main body of the program and execute only when needed. There can be a 250-1 maximum of 128 GTS instructions and 64 SBR instructions used in a program.
• Page 400
  Chapter 5: Standard RLL Instructions — Program Control In the following example, when X1 is on, Subroutine K3 will be called. The CPU will jump to the Subroutine Label K3 and the ladder logic in the subroutine will be executed. If X35 is on the CPU will return to the main program at the RTC instruction.
• Page 401
  Chapter 5: Standard RLL Instructions — Program Control In the following example, when X1 is on, Subroutine K3 will be called. The CPU will jump to the Subroutine Label K3 and the ladder logic in the subroutine will be executed. The CPU will return to the main body of the program after the RT instruction is executed.
• Page 402
  Chapter 5: Standard RLL Instructions — Program Control Master Line Set (MLS) The Master Line Set instruction allows the program to control K aaa sections of ladder logic by forming a new power rail controlled by the main left power rail. The main left rail is always master line 0. When a MLS K1 instruction is used, a new power rail is created at level 1.
• Page 403
  Chapter 5: Standard RLL Instructions — Program Control MLS/MLR Example In the following MLS/MLR example logic between the first MLS K1 (A) and MLR K0 (B) will function only if input X0 is on. The logic between the MLS K2 (C) and MLR K1 (D) will function only if input X10 and X0 is on.

• Page 404: Interrupt Instructions

  Chapter 5: Standard RLL Instructions — Interrupt Interrupt Instructions Interrupt (INT) The Interrupt instruction allows a section of ladder logic to O aaa be placed outside the main body of the program and executed when needed. Interrupts can be called from the program or by external interrupts via the counter interface 250-1 module (D2–CTRINT), which provides 4 interrupts.

• Page 405
  Chapter 5: Standard RLL Instructions — Interrupt Interrupt Return (IRT) When an Interrupt Return is executed in the interrupt routine, the CPU will return to the point in the main body of the program from which it was called. The Interrupt Return is programmed as the last instruction in an interrupt routine and is a stand alone instruction 250-1 (no input contact on the rung).
• Page 406
  Chapter 5: Standard RLL Instructions — Interrupt Interrupt Example for Interrupt Module In the following example, when X40 is on, the interrupts will be enabled. When X40 is off the interrupts will be disabled. When a interrupt signal X1 is received, the CPU will jump to the interrupt label INT O 1.
• Page 407
  Chapter 5: Standard RLL Instructions — Interrupt Interrupt Example for Software Interrupt In the following example, when X1 is on, the value 10 is copied to V7634. This value sets the software interrupt to 10 ms. When X20 turns on, the interrupt will be enabled. When X20 turns off, the interrupt will be disabled.

• Page 408: Intelligent I/O Instructions

  Chapter 5: Standard RLL Instructions — Intelligent I/O Intelligent I/O Instructions Read from Intelligent Module (RD) The Read from Intelligent Module instruction reads a block of data V aaa (1 to 128 bytes maximum) from an intelligent I/O module into the CPU’s V-memory.

• Page 409
  Chapter 5: Standard RLL Instructions — Intelligent I/O Write to Intelligent Module (WT) The Write to Intelligent Module instruction writes a block of data V aaa (1 to 128 bytes maximum) to an intelligent I/O module from a block of V-memory in the CPU. The function parameters are 250-1 loaded into the first and second level of the accumulator stack and the accumulator by three additional instructions.

• Page 410: Network Instructions

  Chapter 5: Standard RLL Instructions — Network Network Instructions Read from Network (RX) The Read from Network instruction is used by the master device on A aaa a network to read a block of data from another CPU. The function parameters are loaded into the first and second level of the 250-1 accumulator stack and the accumulator by three additional…

• Page 411
  Chapter 5: Standard RLL Instructions — Network In the following example, when X1 is on and the module busy relay SP124 (see special relays) is not on, the RX instruction will access an ECOM or DCM operating as a master in slot 2. Ten consecutive bytes of data (V2000 –…
• Page 412
  Chapter 5: Standard RLL Instructions — Network Write to Network (WX) The Write to Network instruction is used to write a block of data A aaa from the master device to a slave device on the same network. The function parameters are loaded into the first and second level of 250-1 the accumulator stack and the accumulator by three additional instructions.
• Page 413
  Chapter 5: Standard RLL Instructions — Network In the following example when X1 is on and the module busy relay SP124 (see special relays) is not on, the WX instruction will access a DCM or ECOM operating as a master in slot 2. Ten consecutive bytes of data is read from the CPU at station address 5 and copied to V- memory locations V2000–V2004 in the slave CPU.

• Page 414: Message Instructions

  Chapter 5: Standard RLL Instructions — Message Message Instructions Fault (FAULT) The Fault instruction is used to display a message on the FAULT handheld programmer or DirectSOFT. The message has a A aaa maximum of 23 characters and can be either V-memory data, numerical constant data or ASCII text.

• Page 415
  Chapter 5: Standard RLL Instructions — Message Fault Example In the following example when X1 is on, the message SW 146 will display on the handheld programmer. The NCONs use the HEX ASCII equivalent of the text to be displayed. (The HEX ASCII for a blank is 20, a 1 is 31, 4 is 34 …) DirectSOFT FAULT…
• Page 416
  Chapter 5: Standard RLL Instructions — Message Data Label (DLBL) The Data Label instruction marks the beginning of an DLBL ASCII / numeric data area. DLBLs are programmed after K aaa the End statement. A maximum of 64 (DL240 and DL250–1/260) or 32 (DL230) DLBL instructions can be 250-1 used in a program.
• Page 417
  Chapter 5: Standard RLL Instructions — Message Data Label Example In the following example, an ACON and two NCON instructions are used within a DLBL instruction to build a text message. See the FAULT instruction for information on displaying messages. DirectSOFT DLBL ACON…
• Page 418
  Chapter 5: Standard RLL Instructions — Message Print Message (PRINT) The Print Message instruction prints the embedded text PRINT A aaa or text/data variable message to the specified “Hello, this is a PLC message” communications port (2 on the DL250–1/260 CPU), 250-1 which must have the communications port configured.
• Page 419
  Chapter 5: Standard RLL Instructions — Message Port 2 on the DL250–1/260 has standard RS232 levels, and should work with most printer serial input connections. Text element — this is used for printing character strings. The character strings are defined as the character (more than 0) ranged by the double quotation marks.
• Page 420
  Chapter 5: Standard RLL Instructions — Message V-memory element – this is used for printing V-memory contents in the integer format or real format. Use V-memory number or V-memory number with “:” and data type. The data types are shown in the table below. The Character code must be capital letters. NOTE: There must be a space entered before and after the V-memory address to separate it from the text string.
• Page 421
  Chapter 5: Standard RLL Instructions — Message Bit element – this is used for printing the state of the designated bit in V-memory or a relay bit. The bit element can be assigned by the designating point (.) and bit number preceded by the V-memory number or relay number.

• Page 422: Modbus Rtu Instructions (Dl260)

  Chapter 5: Standard RLL Instructions — Modbus Modbus RTU Instructions (DL260) Modbus Read from Network (MRX) The Modbus Read from Network (MRX) instruction is used by the DL260 network master to read a block of data from a connected slave device and to write the data into V–memory addresses within the master.

• Page 423
  Chapter 5: Standard RLL Instructions — Modbus • Exception Response Buffer: specifies the master memory address where the Exception Response will be placed (6-bytes in length). See the table on the following page.The exception response buffer uses 3 words. These bytes are swapped in the MRX/MWX exception response buffer V-memory so: V-Memory 1 Hi Byte = Function Code Byte (Most Significant Bit Set) V-Memory 1 Lo Byte = Address Byte V-Memory 2 Hi Byte = One of the CRC Bytes…
• Page 424
  Chapter 5: Standard RLL Instructions — Modbus MRX Number of Elements Number of Elements Operand Data Type DL260 Range V-memory all (see page 3-56) Bits: 1-2000 Constant Registers: 1-125 MRX Exception Response Buffer Exception Response Buffer Operand Data Type DL260 Range V-memory all (see page 3-56) MRX Example…

• Page 425: Modbus Write To Network (Mwx)

  Chapter 5: Standard RLL Instructions — Modbus Modbus Write to Network (MWX) The Modbus Write to Network (MWX) instruction is used to write a block of data from the network master’s (DL260) memory to Modbus memory addresses within a slave device on the network.

• Page 426
  Chapter 5: Standard RLL Instructions — Modbus • Exception Response Buffer: specifies the master memory address where the Exception Response will be placed (6-bytes in length). See the table on the following page.The exception response buffer uses 3 words. These bytes are swapped in the MRX/MWX exception response buffer V-memory so: V-Memory 1 Hi Byte = Function Code Byte (Most Significant Bit Set) V-Memory 1 Lo Byte = Address Byte V-Memory 2 Hi Byte = One of the CRC Bytes…
• Page 427
  Chapter 5: Standard RLL Instructions — Modbus MWX Number of Elements Number of Elements Operand Data Type DL260 Range V-memory all (see page 3-56) Bits: 1-2000 Constant Registers: 1-125 MWX Exception Response Buffer Exception Response Buffer Operand Data Type DL260 Range V-memory all (see page 3-56) MWX Example…

• Page 428: Ascii Instructions (Dl260)

  Chapter 5: Standard RLL Instructions — ASCII ASCII Instructions (DL260) The DL260 CPU supports several instructions and methods that allow ASCII strings to be read into and written from the PLC communications ports. Specifically, port 2 on the DL260 can be used for either reading or writing raw ASCII strings, but cannot be used for both on the same CPU.

• Page 429
  Chapter 5: Standard RLL Instructions — ASCII Managing the ASCII Strings The following instructions can be helpful in managing the ASCII strings within the CPUs V-memory: ASCII Find (AFIND) – Finds where a specific portion of the ASCII string is located in continuous V-memory addresses.
• Page 430
  Chapter 5: Standard RLL Instructions — ASCII AIN Fixed Length Configuration • Length Type: select fixed length based on the length of the ASCII string that will be sent to the CPU port • Port Number: must be DL260 port 2 (K2) •…
• Page 431
  Chapter 5: Standard RLL Instructions — ASCII AIN Fixed Length Examples Fixed Length example when the PLC is reading the port continuously and timing is not critical Fixed Length example when character to character timing is critical 5–214 DL205 User Manual, 4th Edition, Rev. B…
• Page 432
  Chapter 5: Standard RLL Instructions — ASCII AIN Variable Length Configuration: • Length Type: select Variable Length if the ASCII string length followed by termination characters will vary in length • Port Number: must be DL260 port 2 (K2) • Data Destination: specifies where the ASCII string will be placed in V–memory •…
• Page 433
  Chapter 5: Standard RLL Instructions — ASCII Parameter DL260 Range Data Destination All V-memory (See page 3 — 56) Max. Variable Length K1-128 Bits: Busy, Complete, Timeout Error, Overflow C0-3777 AIN Variable Length Example AIN Variable Length example used to read barcodes on boxes (PE = photoelectric sensor). 5–216 DL205 User Manual, 4th Edition, Rev.
• Page 434
  Chapter 5: Standard RLL Instructions — ASCII ASCII Find (AFIND) The ASCII Find instruction locates a specific ASCII string or portion of an ASCII string within a range of V-memory registers and places the string’s Found Index number (byte number where desired string is found), in Hex, into a specified V-memory register. Other features include, Search Starting Index number for skipping over unnecessary bytes before 250-1 beginning the FIND operation, Forward or Reverse direction search, and From Begining and…
• Page 435
  Chapter 5: Standard RLL Instructions — ASCII AFIND Search Example In the following example, the AFIND instruction is used to search for the “day” portion of “Friday” in the ASCII string “Today is Friday.”, which had previously been loaded into V–memory.
• Page 436
  Chapter 5: Standard RLL Instructions — ASCII AFIND Example Combined with AEX Instruction When an AIN instruction has executed, its’ Complete bit can be used to trigger an AFIND instruction to search for a desired portion of the ASCII string. Once the string is found, the AEX instruction can be used to extract the located string.
• Page 437
  Chapter 5: Standard RLL Instructions — ASCII ASCII Extract (AEX) The ASCII Extract instruction extracts a specified number of bytes of ASCII data from one series of V-memory registers and places it into another series of V-memory registers. Other features include, Extract at Index for skipping over unnecessary bytes before begining the 250-1 Extract operation, Shift ASCII Option, for One Byte Left or One Byte Right, Byte Swap and Convert data to a BCD format number.
• Page 438
  Chapter 5: Standard RLL Instructions — ASCII ASCII Compare (CMPV) The ASCII Compare instruction compares two groups of V–memory registers. The CMPV will compare any data type (ASCII to ASCII, BCD to BCD, etc.) of one series (group) of V–memory registers to another series of V–memory registers for a specified byte length. 250-1 “Compare from”…
• Page 439
  Chapter 5: Standard RLL Instructions — ASCII ASCII Print to V-memory (VPRINT) The ASCII Print to V–memory instruction will write a specified ASCII string into a series of V–memory registers. Other features include Byte Swap, options to suppress or convert leading zeros or spaces, and _Date and _Time options for U.S., European, and Asian date formats and 12 or 24 hour time formats.
• Page 440
  Chapter 5: Standard RLL Instructions — ASCII VPRINT V-memory element The following modifiers can be used in the VPRINT ASCII string message to “print to V–memory” register contents in integer format or real format. Use V-memory number or V- memory number with “:” and data type. The data types are shown in the table below. The Character code must be capital letters.
• Page 441
  Chapter 5: Standard RLL Instructions — ASCII Example with V2000 = sp sp18 (binary format) where sp = space Number of Characters V-memory Register with Modifier V2000 V2000:B V2000:BS V2000:BC0 VPRINT V-memory text element The following is used for “printing to V-memory” text stored in registers. Use the % followed by the number of characters after V-memory number for representing the text.
• Page 442
  Chapter 5: Standard RLL Instructions — ASCII The maximum numbers of characters you can VPRINT is 128. The number of characters required for each element, regardless of whether the :S, :C0 or :0 modifiers are used, is listed in the table below. Maximum Element Type Characters…
• Page 443
  Chapter 5: Standard RLL Instructions — ASCII The following examples show various syntax conventions and the length of the output to the printer. Example: ” ” Length 0 without character ”A” Length 1 with character A ” ” Length 1 with blank ”…
• Page 444
  Chapter 5: Standard RLL Instructions — ASCII ASCII Print from V-memory (PRINTV) The ASCII Print from V–memory instruction will send an ASCII string out of the designated communications port from a specified series of V–memory registers for a specified length in number of bytes.
• Page 445
  Chapter 5: Standard RLL Instructions — ASCII ASCII Swap Bytes (SWAPB) The ASCII Swap Bytes instruction swaps byte positions (high–byte to low–byte and low–byte to high–byte) within each V-memory register of a series of V-memory registers for a specified number of bytes. 250-1 •…
• Page 446
  Chapter 5: Standard RLL Instructions — ASCII SWAPB Example The AIN Complete bit is used to trigger the SWAPB instruction. Use a one–shot so the SWAPB only executes once. ASCII Clear Buffer (ACRB) The ASCII Clear Buffer instruction will clear the ASCII receive buffer of the specified communications port number.

• Page 447: Intelligent Box (Ibox) Instructions (Dl250-1/Dl260)

  D2-250-1 CPU requires firmware version v4.60 or later, and the D2-260 CPU requires firmware version v2.40 or later. For more information on DirectSOFT or to download our free version, please visit our Web site at: www.automationdirect.com. Analog Helper IBoxes Instruction…

• Page 448
  CTRIO Write File to ROM (CTRWFTR) IB-1006 5-368 NOTE: Check your CPU firmware version using DirectSOFT: PLC Menu > Diagnostics > System Information. The latest firmware and update tool are available from: http://support.automationdirect.com/firmware/index.html 5–231 DL205 User Manual, 4th Edition, Rev. B…
• Page 449
  Chapter 5: Intelligent Box (IBox) Instructions Analog Input/Output Combo Module Pointer Setup (ANLGCMB) (IB-462) The Analog Input/Output Combo Module Pointer Setup instruction generates the logic to configure the pointer method for an analog input/output combination module on the first PLC scan following a Program to Run transition. The ANLGCMB IBox instruction 250-1 determines the data format and Pointer…
• Page 450
  Chapter 5: Intelligent Box (IBox) Instructions Parameter DL205 Range Base # (K0-Local) ….. . . K K0-3 Slot # ……. . . K K0-7 Number of Input Channels .
• Page 451
  Chapter 5: Intelligent Box (IBox) Instructions Analog Input Module Pointer Setup (ANLGIN) (IB-460) Analog Input Module Pointer Setup generates the logic to configure the pointer method for one analog input module on the first PLC scan following a Program to Run transition. This IBox determines the data format and Pointer addresses based on the 250-1…
• Page 452
  Chapter 5: Intelligent Box (IBox) Instructions ANLGIN Example In the following example, the ANLGIN instruction is used to set up the pointer method for an analog input module that is installed in option slot 1. Eight input channels are enabled and the analog data will be written to V2000 — V2007 in BCD format.
• Page 453
  Chapter 5: Intelligent Box (IBox) Instructions Analog Output Module Pointer Setup (ANLGOUT) (IB-461) Analog Output Module Pointer Setup generates the logic to configure the pointer method for one analog output module on the first PLC scan following a Program to Run transition. This IBox determines the data format and Pointer addresses based on the 250-1…
• Page 454
  Chapter 5: Intelligent Box (IBox) Instructions ANLGOUT Example In the following example, the ANLGOUT instruction is used to set up the pointer method for an analog output module that is installed in option slot 3. Two output channels are enabled and the analog data will be read from V2100 — V2101 in BCD format. No permissive contact or input logic is used with this instruction NOTE: An Analog I/O IBox instruction is used without a permissive contact.
• Page 455
  Chapter 5: Intelligent Box (IBox) Instructions Analog Scale 12-Bit BCD to BCD (ANSCL) (IB-423) Analog Scale 12-Bit BCD to BCD scales a 12-bit BCD analog value (0 to 4095 BCD) into BCD engineering units. You specify the engineering unit high value (when raw is 4095), and the engineering low value (when raw is 0), and the output V-memory address where you want to place the scaled…
• Page 456
  Chapter 5: Intelligent Box (IBox) Instructions Analog Scale 12-Bit Binary to Binary (ANSCLB) (IB-403) Analog Scale 12-Bit Binary to Binary scales a 12-bit binary analog value (0 to 4095 decimal) into binary (decimal) engineering units. You specify the engineering unit high value (when raw is 4095), and the engineering low value (when raw is 0), and the output V- memory address where you want to place…
• Page 457
  Chapter 5: Intelligent Box (IBox) Instructions Filter Over Time — BCD (FILTER) (IB-422) Filter Over Time BCD will perform a first-order filter on the Raw Data on a defined time interval. The equation is: New = Old + [(Raw — Old) / FDC] where, 250-1 New: New Filtered Value…
• Page 458
  Chapter 5: Intelligent Box (IBox) Instructions FILTER Example In the following example, the Filter instruction is used to filter a BCD value that is in V2000. Timer(T0) is set to 0.5 sec, the rate at which the filter calculation will be performed. The filter constant is set to 2.
• Page 459
  Chapter 5: Intelligent Box (IBox) Instructions Filter Over Time — Binary (FILTERB) (IB-402) Filter Over Time in Binary (decimal) will perform a first-order filter on the Raw Data on a defined time interval. The equation is: New = Old + [(Raw — Old) / FDC] where New: New Filtered Value 250-1 Old: Old Filtered Value…
• Page 460
  Chapter 5: Intelligent Box (IBox) Instructions FILTERB Example In the following example, the FILTERB instruction is used to filter a binary value that is in V2000. Timer(T1) is set to 0.5 sec, the rate at which the filter calculation will be performed. The filter constant is set to 3.
• Page 461
  Chapter 5: Intelligent Box (IBox) Instructions Hi/Low Alarm — BCD (HILOAL) (IB-421) Hi/Low Alarm — BCD monitors a BCD value V-memory location and sets four possible alarm states, High-High, High, Low, and Low-Low whenever the IBox has power flow. You enter the alarm thresholds as constant (K) BCD values (K0-K9999) and/or BCD value V-memory locations.
• Page 462
  Chapter 5: Intelligent Box (IBox) Instructions HILOAL Example In the following example, the HILOAL instruction is used to monitor a BCD value that is in V2000. If the value in V2000 meets/exceeds the high limit of K900, C101 will turn on. If the value continues to increase to meet/exceed the high-high limit, C100 will turn on.
• Page 463
  Chapter 5: Intelligent Box (IBox) Instructions Hi/Low Alarm — Binary (HILOALB) (IB-401) Hi/Low Alarm — Binary monitors a binary (decimal) V-memory location and sets four possible alarm states, High-High, High, Low, and Low-Low whenever the IBox has power flow. You enter the alarm thresholds as constant (K) decimal values (K0-K65535) and/or binary (decimal) V-memory locations.
• Page 464
  Chapter 5: Intelligent Box (IBox) Instructions HILOALB Example In the following example, the HILOALB instruction is used to monitor a binary value that is in V2000. If the value in V2000 meets/exceeds the high limit of the binary value in V2011, C101 will turn on.
• Page 465
  Chapter 5: Intelligent Box (IBox) Instructions Off Delay Timer (OFFDTMR) (IB-302) Off Delay Timer will delay the «turning off» of the Output parameter by the specified Off Delay Time (up to 99.99 seconds) based on the power flow into the IBox. Once the IBox receives power, the Output bit will turn on immediately.
• Page 466
  Chapter 5: Intelligent Box (IBox) Instructions OFFDTMR Example In the following example, the OFFDTMR instruction is used to delay the “turning off ”of output C20. Timer 2 (T2) is set to 5 seconds, the “off-delay” period. When C100 turns on, C20 turns on and will remain on while C100 is on. When C100 turns off, C20 will remain on for the specified Off Delay Time (5 secs), and then turn off.
• Page 467
  Chapter 5: Intelligent Box (IBox) Instructions On Delay Timer (ONDTMR) (IB-301) On Delay Timer will delay the «turning on» of the Output parameter by the specified amount of time (up to 99.99 seconds) based on the power flow into the IBox. Once the IBox loses power, the Output is turned off immediately.
• Page 468
  Chapter 5: Intelligent Box (IBox) Instructions ONDTMR Example In the following example, the ONDTMR instruction is used to delay the “turning on” of output C21. Timer 1 (T1) is set to 2 seconds, the “on-delay” period. When C101 turns on, C21 is delayed turning on by 2 seconds. When C101 turns off, C21 turns off imediately.
• Page 469
  Chapter 5: Intelligent Box (IBox) Instructions One Shot (ONESHOT) (IB-303) One Shot will turn on the given bit output parameter for one scan on an OFF to ON transition of the power flow into the IBox. This IBox is simply a different name for the PD Coil (Positive Differential).
• Page 470
  Chapter 5: Intelligent Box (IBox) Instructions Push On/Push Off Circuit (PONOFF) (IB-300) Push On/Push Off Circuit toggles an output state whenever its input power flow transitions from off to on. Requires an extra bit parameter for scan-to-scan state information. This extra bit must NOT be used anywhere else in the program.
• Page 471
  Chapter 5: Intelligent Box (IBox) Instructions Move Single Word (MOVEW) (IB-200) Move Single Word moves (copies) a word to a memory location directly or indirectly via a pointer, either as a HEX constant, from a memory location, or indirectly through a pointer. MOVEW Parameters 250-1 •…
• Page 472
  Chapter 5: Intelligent Box (IBox) Instructions Move Double Word (MOVED) (IB-201) Move Double Word moves (copies) a double word to two consecutive memory locations directly or indirectly via a pointer, either as a double HEX constant, from a double memory location, or indirectly through a pointer to a double memory location.
• Page 473
  Chapter 5: Intelligent Box (IBox) Instructions BCD to Real with Implied Decimal Point (BCDTOR) (IB-560) BCD to Real with Implied Decimal Point converts the given 4-digit WORD BCD value to a Real number, with the implied number of decimal points (K0-K4). For example, BCDTOR K1234 with an implied number of decimal points equal to 250-1…
• Page 474
  Chapter 5: Intelligent Box (IBox) Instructions Double BCD to Real with Implied Decimal Point (BCDTORD) (IB-562) Double BCD to Real with Implied Decimal Point converts the given 8-digit DWORD BCD value to a Real number, given an implied number of decimal points (K0-K8). For example, BCDTORD K12345678 with 250-1 an implied number of decimal points equal to…
• Page 475
  Chapter 5: Intelligent Box (IBox) Instructions Math — BCD (MATHBCD) (IB-521) Math — BCD Format lets you enter complex mathematical expressions like you would in Visual Basic, Excel, or C++ to do complex calculations, nesting parentheses up to 4 levels deep.
• Page 476
  Chapter 5: Intelligent Box (IBox) Instructions MATHBCD Example In the following example, the MATHBCD instruction is used to calculate the math expression which multiplies the BCD value in V1200 by 1000 then divides by 4095 and loads the resulting value in V2000 when C100 turns on. 5–259 DL205 User Manual, 4th Edition, Rev.
• Page 477
  Chapter 5: Intelligent Box (IBox) Instructions Math — Binary (MATHBIN) (IB-501) Math — Binary Format lets you enter complex mathematical expressions like you would in Visual Basic, Excel, or C++ to do complex calculations, nesting parentheses up to 4 levels deep. In addition to + — * /, you 250-1 can do Modulo (% aka Remainder), Shift Right (>>) and Shift Left (<<), Bit-wise And…
• Page 478
  Chapter 5: Intelligent Box (IBox) Instructions MATHBIN Example In the following example, the MATHBIN instruction is used to calculate the math expression which multiplies the Binary value in V1200 by 1000 then divides by 4095 and loads the resulting value in V2000 when C100 turns on. 5–261 DL205 User Manual, 4th Edition, Rev.
• Page 479
  Chapter 5: Intelligent Box (IBox) Instructions Math — Real (MATHR) (IB-541) Math — Real Format lets you enter complex mathematical expressions like you would in Visual Basic, Excel, or C++ to do complex calculations, nesting parentheses up to 4 levels deep. In addition to + — * /, you can do 250-1 Bit-wise And (&) Or (|) and Xor (^).
• Page 480
  Chapter 5: Intelligent Box (IBox) Instructions Real to BCD with Implied Decimal Point and Rounding (RTOBCD) (IB-561) Real to BCD with Implied Decimal Point and Rounding converts the absolute value of the given Real number to a 4-digit BCD number, compensating for an implied number of decimal points (K0-K4) and performs rounding.
• Page 481
  Chapter 5: Intelligent Box (IBox) Instructions Real to Double BCD with Implied Decimal Point and Rounding (RTOBCDD) (IB-563) Real to Double BCD with Implied Decimal Point and Rounding converts the absolute value of the given Real number to an 8-digit DWORD BCD number, compensating for an implied number of decimal points (K0- 250-1…
• Page 482
  Chapter 5: Intelligent Box (IBox) Instructions Square BCD (SQUARE) (IB-523) Square BCD squares the given 4-digit WORD BCD number and writes it as an 8-digit DWORD BCD result. SQUARE Parameters 250-1 • Value (WORD BCD): specifies the BCD Word or constant that will be squared •…
• Page 483
  Chapter 5: Intelligent Box (IBox) Instructions Square Binary (SQUAREB) (IB-503) Square Binary squares the given 16-bit WORD Binary number and writes it as a 32-bit DWORD Binary result. SQUAREB Parameters 250-1 • Value (WORD Binary): specifies the binary Word or constant that will be squared •…
• Page 484
  Chapter 5: Intelligent Box (IBox) Instructions Square Real (SQUARER) (IB-543) Square Real squares the given REAL DWORD number and writes it to a REAL DWORD result. SQUARER Parameters 250-1 • Value (REAL DWORD): specifies the Real DWORD location or number that will be squared •…
• Page 485
  Chapter 5: Intelligent Box (IBox) Instructions Sum BCD Numbers (SUMBCD) (IB-522) Sum BCD Numbers sums up a list of consecutive 4-digit WORD BCD numbers into an 8- digit DWORD BCD result. You specify the group’s starting and ending V-memory addresses (inclusive). When enabled, this instruction will add up all the 250-1 numbers in the group (so you may want to…
• Page 486
  Chapter 5: Intelligent Box (IBox) Instructions Sum Binary Numbers (SUMBIN) (IB-502) Sum Binary Numbers sums up a list of consecutive 16-bit WORD Binary numbers into a 32- bit DWORD binary result. You specify the group’s starting and ending V-memory addresses (inclusive). When 250-1 enabled, this instruction will add up all the numbers in the group (so you may want to…
• Page 487
  Chapter 5: Intelligent Box (IBox) Instructions Sum Real Numbers (SUMR) (IB-542) Sum Real Numbers sums up a list of consecutive REAL DWORD numbers into a REAL DWORD result. You specify the group’s starting and ending V-memory addresses (inclusive). 250-1 Remember that Real numbers are DWORDs and occupy 2 words of V-memory each, so the number of Real values summed up is equal to half the number of memory…
• Page 488
  Chapter 5: Intelligent Box (IBox) Instructions SUMR Example In the following example, the SUMR instruction is used to total the sum of all floating point REAL number values in words V2000 thru V2007 and store the resulting 32-bit floating point REAL number value in V3000 and V3001 when C100 turns on. 5–271 DL205 User Manual, 4th Edition, Rev.
• Page 489
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Configuration (ECOM100) (IB-710) ECOM100 Configuration defines all the common information for one specific ECOM100 module which is used by the other ECOM100 IBoxes; for example, ECRX — ECOM100 Network Read , ECEMAIL — ECOM100 Send EMail, ECIPSUP — ECOM100 IP Setup, etc.
• Page 490
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Example The ECOM100 Config IBox coordinates all of the interaction with other ECOM100 based IBoxes (ECxxxx). You must have an ECOM100 Config IBox for each ECOM100 module in your system. Configuration IBoxes must be at the top of your program and must execute every scan.
• Page 491
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Disable DHCP (ECDHCPD) (IB-736) ECOM100 Disable DHCP will set up the ECOM100 to use its internal TCP/IP settings on a leading edge transition to the IBox. To configure the ECOM100’s TCP/IP settings manually, use the NetEdit3 utility, or you can do it programmatically from your PLC program using the ECOM100 IP Setup 250-1…
• Page 492
  Chapter 5: Intelligent Box (IBox) Instructions ECDHCPD Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 493
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Enable DHCP (ECDHCPE) (IB-735) ECOM100 Enable DHCP will tell the ECOM100 to obtain its TCP/IP setup from a DHCP Server on a leading edge transition to the IBox. The IBox will be successful once the ECOM100 has received its TCP/IP settings from the DHCP 250-1 server.
• Page 494
  Chapter 5: Intelligent Box (IBox) Instructions ECDHCPE Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 495
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Query DHCP Setting (ECDHCPQ) (IB-734) ECOM100 Query DHCP Setting will determine if DHCP is enabled in the ECOM100 on a leading edge transition to the IBox. The DHCP Enabled bit parameter will be ON if DHCP is enabled, OFF if disabled.
• Page 496
  Chapter 5: Intelligent Box (IBox) Instructions ECDHCPQ Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 497
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Send E-mail (ECEMAIL) (IB-711) ECOM100 Send EMail, on a leading edge transition, will behave as an EMail client and send an SMTP request to your SMTP Server to send the EMail message to the EMail addresses in the To: field and also to those listed in the Cc: list hard coded in the ECOM100.
• Page 498
  Chapter 5: Intelligent Box (IBox) Instructions Parameter DL205 Range ECOM100# ……K K0-255 Workspace .
• Page 499
  Chapter 5: Intelligent Box (IBox) Instructions ECEMAIL Example (cont’d) Rung 2: When a machine goes down, send an email to Joe in maintenance and to the VP over production showing what machine is down along with the date/time stamp of when it went down.
• Page 500
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Restore Default E-mail Setup (ECEMRDS) (IB-713) ECOM100 Restore Default EMail Setup, on a leading edge transition, will restore the original EMail Setup data stored in the ECOM100 back to the working copy based on the specified ECOM100#, which corresponds to a specific unique ECOM100 Configuration (ECOM100) at the top of…
• Page 501
  Chapter 5: Intelligent Box (IBox) Instructions ECEMRDS Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 502
  Chapter 5: Intelligent Box (IBox) Instructions ECEMRDS Example (cont’d) Rung 3: Once the EStop is pulled out, take the president off the cc: list by restoring the default EMail setup in the ECOM100. The ECEMRDS is leading edge triggered, not power-flow driven (similar to a counter input leg).
• Page 503
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 E-mail Setup (ECEMSUP) (IB-712) ECOM100 EMail Setup, on a leading edge transition, will modify the working copy of the EMail setup currently in the ECOM100 based on the specified ECOM100#, which corresponds to a specific unique ECOM100 Configuration (ECOM100) at the top of your program.
• Page 504
  Chapter 5: Intelligent Box (IBox) Instructions ECEMSUP Parameters (cont’d) • Port Number: optional parameter that specifies the TCP/IP Port Number to send SMTP requests; usually this does not need to be configured (see your network administrator for information on this setting) •…
• Page 505
  Chapter 5: Intelligent Box (IBox) Instructions ECEMSUP Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 506
  Chapter 5: Intelligent Box (IBox) Instructions ECEMSUP Example (cont’d) Rung 2: Whenever an EStop is pushed, ensure that president of the company gets copies of all EMails being sent.The ECOM100 EMail Setup IBox allows you to set/change the SMTP EMail settings stored in the ECOM100. The ECEMSUP is leading edge triggered, not power-flow driven (similar to a counter input leg).
• Page 507
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 IP Setup (ECIPSUP) (IB-717) ECOM100 IP Setup will configure the three TCP/IP parameters in the ECOM100: IP Address, Subnet Mask, and Gateway Address, on a leading edge transition to the IBox. The ECOM100 is specified by the ECOM100#, which corresponds to a specific unique ECOM100 Configuration (ECOM100) IBox 250-1…
• Page 508
  Chapter 5: Intelligent Box (IBox) Instructions ECIPSUP Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 509
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Read Description (ECRDDES) (IB-726) ECOM100 Read Description will read the ECOM100’s Description field up to the number of specified characters on a leading edge transition to the IBox. The Workspace parameter is an internal, private register used by this IBox and MUST 250-1 BE UNIQUE in this one instruction and…
• Page 510
  Chapter 5: Intelligent Box (IBox) Instructions ECRDDES Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 511
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Read Gateway Address (ECRDGWA) (IB-730) ECOM100 Read Gateway Address will read the 4 parts of the Gateway IP address and store them in 4 consecutive V-memory locations in decimal format, on a leading edge transition to the IBox.
• Page 512
  Chapter 5: Intelligent Box (IBox) Instructions ECRDGWA Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 513
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Read IP Address (ECRDIP) (IB-722) ECOM100 Read IP Address will read the 4 parts of the IP address and store them in 4 consecutive V-memory locations in decimal format, on a leading edge transition to the IBox. The Workspace parameter is an internal, 250-1 private register used by this IBox and MUST…
• Page 514
  Chapter 5: Intelligent Box (IBox) Instructions ECRDIP Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 515
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Read Module ID (ECRDMID) (IB-720) ECOM100 Read Module ID will read the binary (decimal) WORD sized Module ID on a leading edge transition to the IBox. The Workspace parameter is an internal, private register used by this IBox and MUST 250-1 BE UNIQUE in this one instruction and MUST NOT be used anywhere else in your…
• Page 516
  Chapter 5: Intelligent Box (IBox) Instructions ECRDMID Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 517
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Read Module Name (ECRDNAM) (IB-724) ECOM100 Read Name will read the Module Name up to the number of specified characters on a leading edge transition to the IBox. The Workspace parameter is an internal, private register used by this IBox and MUST BE UNIQUE in this one instruction and 250-1…
• Page 518
  Chapter 5: Intelligent Box (IBox) Instructions ECRDNAM Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 519
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Read Subnet Mask (ECRDSNM) (IB-732) ECOM100 Read Subnet Mask will read the 4 parts of the Subnet Mask and store them in 4 consecutive V-memory locations in decimal format, on a leading edge transition to the IBox. The Workspace parameter is an internal, private register used by this IBox and MUST BE UNIQUE in this one instruction and…
• Page 520
  Chapter 5: Intelligent Box (IBox) Instructions ECRDSNM Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 521
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Write Description (ECWRDES) (IB-727) ECOM100 Write Description will write the given Description to the ECOM100 module on a leading edge transition to the IBox. If you use a dollar sign ($) or double quote («), use the PRINT/VPRINT escape sequence of TWO dollar signs ($$) for a single dollar sign or dollar sign-double quote ($») for a double…
• Page 522
  Chapter 5: Intelligent Box (IBox) Instructions ECWRDES Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 523
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Write Gateway Address (ECWRGWA) (IB-731) ECOM100 Write Gateway Address will write the given Gateway IP Address to the ECOM100 module on a leading edge transition to the IBox. See also ECOM100 IP Setup (ECIPSUP) IBox 717 to setup ALL of the TCP/IP parameters in a single instruction — IP Address, Subnet Mask, and Gateway Address.
• Page 524
  Chapter 5: Intelligent Box (IBox) Instructions ECWRGWA Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 525
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Write IP Address (ECWRIP) (IB-723) ECOM100 Write IP Address will write the given IP Address to the ECOM100 module on a leading edge transition to the IBox. See also ECOM100 IP Setup (ECIPSUP) IBox 717 to setup ALL of the TCP/IP parameters in a single instruction — IP Address, Subnet Mask, and Gateway Address.
• Page 526
  Chapter 5: Intelligent Box (IBox) Instructions ECWRIP Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 527
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Write Module ID (ECWRMID) (IB-721) ECOM100 Write Module ID will write the given Module ID on a leading edge transition to the IBox If the Module ID is set in the hardware using the dipswitches, this IBox will fail and return 250-1 error code 1005 (decimal).
• Page 528
  Chapter 5: Intelligent Box (IBox) Instructions ECWRMID Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 529
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Write Name (ECWRNAM) (IB-725) ECOM100 Write Name will write the given Name to the ECOM100 module on a leading edge transition to the IBox. If you use a dollar sign ($) or double quote («), use the PRINT/VPRINT escape sequence of TWO dollar signs ($$) for a single dollar sign or dollar sign-double quote ($») for a double…
• Page 530
  Chapter 5: Intelligent Box (IBox) Instructions ECWRNAM Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 531
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 Write Subnet Mask (ECWRSNM) (IB-733) ECOM100 Write Subnet Mask will write the given Subnet Mask to the ECOM100 module on a leading edge transition to the IBox. See also ECOM100 IP Setup (ECIPSUP) IBox 717 to setup ALL of the TCP/IP parameters in a single instruction — IP Address, Subnet Mask, and Gateway Address.
• Page 532
  Chapter 5: Intelligent Box (IBox) Instructions ECWRSNM Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 533
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 RX Network Read (ECRX) (IB-740) ECOM100 RX Network Read performs the RX instruction with built-in interlocking with all other ECOM100 RX (ECRX) and ECOM100 WX (ECWX) IBoxes in your program to simplify communications networking. It will perform the RX on the specified ECOM100#’s network, which corresponds to a specific 250-1…
• Page 534
  Chapter 5: Intelligent Box (IBox) Instructions ECRX Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 535
  Chapter 5: Intelligent Box (IBox) Instructions ECRX Example (cont’d) Rung 2: Using ECOM100# K0, read X0-X7 from Slave K7 and write them to slave K5 as fast as possible. Store them in this local PLC in C200-C207, and write them to C300-C307 in slave K5.
• Page 536
  Chapter 5: Intelligent Box (IBox) Instructions ECOM100 WX Network Write(ECWX) (IB-741) ECOM100 WX Network Write performs the WX instruction with built-in interlocking with all other ECOM100 RX (ECRX) and ECOM100 WX (ECWX) IBoxes in your program to simplify communications networking. It will perform the WX on the specified ECOM100#’s network, which corresponds to 250-1…
• Page 537
  Chapter 5: Intelligent Box (IBox) Instructions ECWX Example Rung 1: The ECOM100 Config IBox is responsible for coordination/interlocking of all ECOM100 type IBoxes for one specific ECOM100 module. Tag the ECOM100 in slot 1 as ECOM100# K0. All other ECxxxx IBoxes refer to this module # as K0. If you need to move the module in the base to a different slot, then you only need to change this one IBox.
• Page 538
  Chapter 5: Intelligent Box (IBox) Instructions ECWX Example (cont’d) Rung 2: Using ECOM100# K0, read X0-X7 from Slave K7 and write them to slave K5 as fast as possible. Store them in this local PLC in C200-C207, and write them to C300-C307 in slave K5.
• Page 539
  Chapter 5: Intelligent Box (IBox) Instructions NETCFG Network Configuration (NETCFG) (IB-700) Network Config defines all the common information necessary for performing RX/WX Networking using the NETRX and NETWX IBox instructions via a local CPU serial port, DCM or ECOM module. You must have the Network Config 250-1 instruction at the top of your ladder/stage…
• Page 540
  Chapter 5: Intelligent Box (IBox) Instructions NETCFG Example The Network Configuration IBox coordinates all of the interaction with other Network IBoxes (NETRX/NETWX). You must have a Network Configuration IBox for each serial port network, DCM module network, or original ECOM module network in your system. Configuration IBoxes must be at the top of your program and must execute every scan.
• Page 541
  Chapter 5: Intelligent Box (IBox) Instructions Network RX Read (NETRX) (IB-701) Network RX Read performs the RX instruction with built-in interlocking with all other Network RX (NETRX) and Network WX (NETWX) IBoxes in your program to simplify communications networking. It will perform the RX on the specified Network #, which corresponds to a specific unique Network 250-1…
• Page 542
  Chapter 5: Intelligent Box (IBox) Instructions NETRX Example Rung 1: The Network Configuration IBox coordinates all of the interaction with other Network IBoxes (NETRX/NETWX). You must have a Network Configuration IBox for each serial port network, DCM module network, or original ECOM module network in your system.
• Page 543
  Chapter 5: Intelligent Box (IBox) Instructions NETRX Example (cont’d) Rung 2: Using Network# K0, read X0-X7 from Slave K7 and write them to slave K5 as fast as possible. Store them in this local PLC in C200-C207, and write them to C300-C307 in slave Both the NETRX and NETWX work with the Network Config IBox to simplify all networking by handling all of the interlocks and proper resource sharing.
• Page 544
  Chapter 5: Intelligent Box (IBox) Instructions Network WX Write (NETWX) (IB-702) Network WX Write performs the WX instruction with built-in interlocking with all other Network RX (NETRX) and Network WX (NETWX) IBoxes in your program to simplify communications networking. It will perform the WX on the specified Network #, which corresponds to a specific unique 250-1…
• Page 545
  Chapter 5: Intelligent Box (IBox) Instructions NETWX Example Rung 1: The Network Configuration IBox coordinates all of the interaction with other Network IBoxes (NETRX/NETWX). You must have a Network Configuration IBox for each serial port network, DCM module network, or original ECOM module network in your system.
• Page 546
  Chapter 5: Intelligent Box (IBox) Instructions NETWX Example (cont’d) Rung 2: Using Network# K0, read X0-X7 from Slave K7 and write them to slave K5 as fast as possible. Store them in this local PLC in C200-C207, and write them to C300-C307 in slave Both the NETRX and NETWX work with the Network Config IBox to simplify all networking by handling all of the interlocks and proper resource sharing.
• Page 547
  Chapter 5: Intelligent Box (IBox) Instructions CTRIO Configuration (CTRIO) (IB-1000) CTRIO Config defines all the common information for one specific CTRIO module which is used by the other CTRIO IBox instructions (for example, CTRLDPR — CTRIO Load Profile, CTREDRL — CTRIO Edit and Reload Preset Table, CTRRTLM — CTRIO Run to Limit Mode, …).
• Page 548
  Chapter 5: Intelligent Box (IBox) Instructions Parameter DL205 Range CTRIO# ……. K K0-255 Slot .
• Page 549
  Chapter 5: Intelligent Box (IBox) Instructions CTRIO Add Entry to End of Preset Table (CTRADPT) (IB-1005) CTRIO Add Entry to End of Preset Table, on a leading edge transition to this IBox, will append an entry to the end of a memory based Preset Table on a specific CTRIO Output resource.
• Page 550
  Chapter 5: Intelligent Box (IBox) Instructions CTRADPT Example Rung 1: This sets up the CTRIO module in slot 2 of the local base. Each CTRIO module in the system will need a separate CTRIO Config IBox before any CTRxxxx IBoxes can be used. The CTRIO has been configured to use V2000 through V2025 for its input data, and V2030 through V2061 for its output data.
• Page 551
  Chapter 5: Intelligent Box (IBox) Instructions CTRADPT Example (cont’d) Rung 3: This rung allows the programmer to reset the counter from the ladder logic. Rung 4: This rung allows the operator to enable output #0 from the ladder code. 5–334 DL205 User Manual, 4th Edition, Rev.
• Page 552
  Chapter 5: Intelligent Box (IBox) Instructions CTRIO Clear Preset Table (CTRCLRT) (IB-1007) CTRIO Clear Preset Table will clear the RAM based Preset Table on a leading edge transition to this IBox. This IBox will take more than one PLC scan to execute. Either the Success or Error bit will turn on when the command is complete.
• Page 553
  Chapter 5: Intelligent Box (IBox) Instructions CTRCLRT Example Rung 1: This sets up the CTRIO module in slot 2 of the local base. Each CTRIO module in the system will need a separate CTRIO Config IBox before any CTRxxxx IBoxes can be used. The CTRIO has been configured to use V2000 through V2025 for its input data, and V2030 through V2061 for its output data.
• Page 554
  Chapter 5: Intelligent Box (IBox) Instructions CTRCLRT Example (cont’d) Rung 3: This rung allows the programmer to reset the counter from the ladder logic. Rung 4: This rung allows the operator to enable output #0 from the ladder code. 5–337 DL205 User Manual, 4th Edition, Rev.
• Page 555
  Chapter 5: Intelligent Box (IBox) Instructions CTRIO Edit Preset Table Entry (CTREDPT) (IB-1003) CTRIO Edit Preset Table Entry, on a leading edge transition to this IBox, will edit a single entry in a Preset Table on a specific CTRIO Output resource. This IBox is good if you are editing more than one entry in a file at a time.
• Page 556
  Chapter 5: Intelligent Box (IBox) Instructions Parameter DL205 Range CTRIO# ……. K K0-255 Output# .
• Page 557
  Chapter 5: Intelligent Box (IBox) Instructions CTREDPT Example (cont’d) Rung 2: This rung is a sample method for enabling the CTREDPT command. A C-bit is used to allow the programmer to control the command from Data View for testing purposes. Turning on C0 will cause the CTREDPT instruction to change the second preset from a reset at a count of 20 to a reset at a count of 30 for output #0 on the CTRIO in slot 2.
• Page 558
  Chapter 5: Intelligent Box (IBox) Instructions CTREDPT Example (cont’d) Rung 3: This rung allows the programmer to reset the counter from the ladder logic. Rung 4: This rung allows the operator to enable output #0 from the ladder code. 5–341 DL205 User Manual, 4th Edition, Rev.
• Page 559
  Chapter 5: Intelligent Box (IBox) Instructions CTRIO Edit Preset Table Entry and Reload (CTREDRL) (IB-1002) CTRIO Edit Preset Table Entry and Reload, on a leading edge transition to this IBox, will perform this dual operation to a CTRIO Output resource in one CTRIO command. This IBox will take more than one PLC scan to execute.
• Page 560
  Chapter 5: Intelligent Box (IBox) Instructions Parameter DL205 Range CTRIO# ……. K K0-255 Output# .
• Page 561
  Chapter 5: Intelligent Box (IBox) Instructions CTREDRL Example (cont’d) Rung 2: This rung is a sample method for enabling the CTREDRL command. A C-bit is used to allow the programmer to control the command from Data View for testing purposes. Turning on C0 will cause the CTREDRL instruction to change the second preset in file 1 from a reset value of 20 to a reset value of 30.
• Page 562
  Chapter 5: Intelligent Box (IBox) Instructions CTREDRL Example (cont’d) Rung 3: This rung allows the programmer to reset the counter from the ladder logic. Rung 4: This rung allows the operator to enable output #0 from the ladder code. 5–345 DL205 User Manual, 4th Edition, Rev.
• Page 563
  Chapter 5: Intelligent Box (IBox) Instructions CTRIO Initialize Preset Table (CTRINPT) (IB-1004) CTRIO Initialize Preset Table, on a leading edge transition to this IBox, will create a single entry Preset Table in memory but not as a file, on a specific CTRIO Output resource. This IBox will take more than one PLC scan to execute.
• Page 564
  Chapter 5: Intelligent Box (IBox) Instructions Parameter DL205 Range CTRIO# ……. K K0-255 Output# .
• Page 565
  Chapter 5: Intelligent Box (IBox) Instructions CTRINPT Example (cont’d) Rung 2: This rung is a sample method for enabling the CTRINPT command. A C-bit is used to allow the programmer to control the command from Data View for testing purposes. Turning on C0 will cause the CTRINPT instruction to create a single entry preset table, but not as a file, and use it for the output #0.
• Page 566
  Chapter 5: Intelligent Box (IBox) Instructions CTRINPT Example (cont’d) Rung 3: This rung allows the programmer to reset the counter from the ladder logic. Rung 4: This rung allows the operator to enable output #0 from the ladder code. 5–349 DL205 User Manual, 4th Edition, Rev.
• Page 567
  Chapter 5: Intelligent Box (IBox) Instructions CTRIO Initialize Preset Table on Reset (CTRINTR) (IB-1010) CTRIO Initialize Preset Table on Reset, on a leading edge transition to this IBox, will create a single entry Preset Table in memory but not as a file, on a specific CTRIO Output resource.This IBox will take more than 1 PLC scan to execute.
• Page 568
  Chapter 5: Intelligent Box (IBox) Instructions Parameter DL205 Range CTRIO# ……. K K0-255 Output# .
• Page 569
  Chapter 5: Intelligent Box (IBox) Instructions CTRINTR Example (cont’d) Rung 2: This rung is a sample method for enabling the CTRINTR command. A C-bit is used to allow the programmer to control the command from Data View for testing purposes. Turning on C0 will cause the CTRINTR instruction to create a single entry preset table, but not as a file, and use it for output #0, the new preset will be loaded when the current count is reset.
• Page 570
  Chapter 5: Intelligent Box (IBox) Instructions CTRINTR Example (cont’d) Rung 3: This rung allows the programmer to reset the counter from the ladder logic. Rung 4: This rung allows the operator to enable output #0 from the ladder code. 5–353 DL205 User Manual, 4th Edition, Rev.
• Page 571
  Chapter 5: Intelligent Box (IBox) Instructions CTRIO Load Profile (CTRLDPR) (IB-1001) CTRIO Load Profile loads a CTRIO Profile File to a CTRIO Output resource on a leading edge transition to this IBox. This IBox will take more than one PLC scan to execute. Either the Success or Error bit will turn on when the command is complete.
• Page 572
  Chapter 5: Intelligent Box (IBox) Instructions CTRLDPR Example Rung 1: This sets up the CTRIO module in slot 2 of the local base. Each CTRIO module in the system will need a separate CTRIO Config IBox before any CTRxxxx IBoxes can be used. The CTRIO has been configured to use V2000 through V2025 for its input data, and V2030 through V2061 for its output data.
• Page 573
  Chapter 5: Intelligent Box (IBox) Instructions CTRLDPR Example (cont’d) Rung 3: If the file is successfully loaded, set Profile_Loaded. 5–356 DL205 User Manual, 4th Edition, Rev. B…
• Page 574
  Chapter 5: Intelligent Box (IBox) Instructions CTRIO Read Error (CTRRDER) (IB-1014) CTRIO Read Error Code, on a leading edge transition to this IBox, will read the decimal error code value (listed below) from the CTRIO module and place it in the specified Error Code register.
• Page 575
  Chapter 5: Intelligent Box (IBox) Instructions CTRRDER Example Rung 1: This sets up the CTRIO module in slot 2 of the local base. Each CTRIO module in the system will need a separate CTRIO Config IBox before any CTRxxxx IBoxes can be used. The CTRIO has been configured to use V2000 through V2025 for its input data, and V2030 through V2061 for its output data.
• Page 576
  Chapter 5: Intelligent Box (IBox) Instructions CTRIO Run to Limit Mode (CTRRTLM) (IB-1011) CTRIO Run To Limit Mode, on a leading edge transition to this IBox, loads the Run to Limit command and given parameters on a specific Output resource. The CTRIO’s Input(s) must be configured as Limit(s) for this function to work.
• Page 577
  Chapter 5: Intelligent Box (IBox) Instructions Parameter DL205 Range CTRIO# ……. K K0-255 Output# .
• Page 578
  Chapter 5: Intelligent Box (IBox) Instructions CTRRTLM Example (cont’d) Rung 3: If the Run To Limit Mode parameters are OK, set the Direction Bit and Enable the output. 5–361 DL205 User Manual, 4th Edition, Rev. B…
• Page 579
  Chapter 5: Intelligent Box (IBox) Instructions CTRIO Run to Position Mode (CTRRTPM) (IB-1012) CTRIO Run To Position Mode, on a leading edge transition to this IBox, loads the Run to Position command and given parameters on a specific Output resource. Valid Function Values are: 00: Less Than Ch1/Fn1 250-1…
• Page 580
  Chapter 5: Intelligent Box (IBox) Instructions Parameter DL205 Range CTRIO# ……. K K0-255 Output# .
• Page 581
  Chapter 5: Intelligent Box (IBox) Instructions CTRRTPM Example (cont’d) Rung 2: This CTRIO Run To Position Mode IBox sets up Output #0 in CTRIO #1 to output pulses at a Frequency of 1000 Hz, use the ‘Greater than Ch1/Fn1’ comparison operator, until the input position of 1500 is reached.
• Page 582
  Chapter 5: Intelligent Box (IBox) Instructions CTRIO Velocity Mode (CTRVELO) (IB-1013) CTRIO Velocity Mode loads the Velocity command and given parameters on a specific Output resource on a leading edge transition to this IBox. This IBox will take more than one PLC scan to execute.
• Page 583
  Chapter 5: Intelligent Box (IBox) Instructions CTRVELO Example Rung 1: This sets up the CTRIO module in slot 2 of the local base. Each CTRIO module in the system will need a separate CTRIO Config IBox before any CTRxxxx IBoxes can be used. The CTRIO has been configured to use V2000 through V2025 for its input data, and V2030 through V2061 for its output data.
• Page 584
  Chapter 5: Intelligent Box (IBox) Instructions CTRVELO Example (cont’d) Rung 3: If the Velocity Mode parameters are OK, set the Direction Bit and Enable the output. 5–367 DL205 User Manual, 4th Edition, Rev. B…
• Page 585
  Chapter 5: Intelligent Box (IBox) Instructions CTRIO Write File to ROM (CTRWFTR) (IB-1006) CTRIO Write File to ROM writes the runtime changes made to a loaded CTRIO Preset Table back to Flash ROM on a leading edge transition to this IBox. This IBox will take more than one PLC scan to execute.
• Page 586
  Chapter 5: Intelligent Box (IBox) Instructions CTRWFTR Example Rung 1: This sets up the CTRIO module in slot 2 of the local base. Each CTRIO module in the system will need a separate CTRIO Config IBox before any CTRxxxx IBoxes can be used. The CTRIO has been configured to use V2000 through V2025 for its input data, and V2030 through V2061 for its output data.
• Page 587
  Chapter 5: Intelligent Box (IBox) Instructions CTRWFTR Example (cont’d) Rung 3: If the file is successfully editted, use a Write File To ROM IBox to save the edited table back to the CTRIO’s ROM, thereby making the changes retentive. 5–370 DL205 User Manual, 4th Edition, Rev.

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